P4C107 - ULTRA HIGH SPEED 1M X 1 STATIC CMOS RAM

Page 4

Document # SRAM139 REV OR

notes:

1. Stresses greater than those listed under MAxIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only

and functional operation of the device at these or any other conditions

above those indicated in the operational sections of this specification

is not implied. Exposure to MAxIMUM rating conditions for extended

periods may affect reliability.

2. Extended temperature operation guaranteed with 400 linear feet per

minute of air flow.

3. Transient inputs with V

–100mA, respectively, are permissible for pulse widths up to 20ns.

4. This parameter is sampled and not 100% tested.

5. WE is HIGH for READ cycle.

6. CE is LOW and OE is LOW for READ cycle.

7. ADDRESS must be valid prior to, or coincident with CE transition

LOW.

8. Transition is measured ± 200 mV from steady state voltage prior to

change,withloadingasspecifiedinFigure1. Thisparameterissampled

and not 100% tested.

9. Read Cycle Time is measured from the last valid address to the first

transitioning address.

AC CHARACTERISTICS—WRITE CYCLE

(V

(2)

Sym Parameter

-10

-12

-15

-20

Unit

Min

Max

Min

Max

Min

Max

Min

Max

t

WC

Write Cycle Time

10

12

15

20

ns

t

CW

Chip Enable Time to End of Write

7

10

12

15

ns

t

AW

Address Valid to End of Write

7

10

12

15

ns

t

AS

Address Setup Time

0

0

0

0

ns

t

WP

Write Pulse Width

7

10

12

15

ns

t

AH

Address Hold Time

0

0

0

0

ns

t

DW

Data Valid to End of Write

6

7

8

10

ns

t

DH

Data Hold Time

0

0

0

0

ns

t

WZ

Write Enable to Output in High Z

6

7

8

9

ns

t

OW

Output Active from End of Write

0

0

0

0

ns