TDA8596_15 datasheet(21/48 Pages) PHILIPS

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TDA8596_2

Product data sheet

Rev. 02 — 8 November 2007

21 of 48

NXP Semiconductors

TDA8596

I2C-bus controlled 4

× 45 W power ampliﬁer with symmetrical inputs

8.1 Instruction bytes

I2C-bus mode:

• If R/W bit = 0, the TDA8596 expects 3 instruction bytes: IB1, IB2 and IB3

• After a power-on reset, all instruction bits are set to logic 0

Legacy mode:

• The settings are equal to the condition with all instruction bits set to logic 0 (see

Table 8), with the exception of IB1[D0] bit that is ignored in legacy mode.

Fig 16. I2C-bus read and write modes

001aac649

ACK

MSB

− 1

MSB

− 1

MSB

LSB + 1

LSB

LSB + 1

78912

789

78912

789

: generated by master (microcontroller)

To stop the transfer, after the last acknowledge (A)

a STOP condition (P) must be generated

To stop the transfer, the last byte must not be acknowledged

and a STOP condition (P) must be generated

: generated by slave

: START

: STOP

: acknowledge

: read / write

R/W

: not acknowledge

SCL

SDA

SCL

SDA

ACK

MSB

− 1

MSB

− 1

LSB + 1

LSB

LSB + 1

ACK

ADDRESS

WRITE DATA

READ DATA

ADDRESS

I2C-BUS WRITE

I2C-BUS READ

Table 8.

Instruction byte IB1

Bit

Description

don’t care

channel 3 clip information on DIAG or STB pin

0 = clip information on DIAG pin

1 = clip information on STB pin

channel 1 clip information on DIAG or STB pin

0 = clip information on DIAG pin

1 = clip information on STB pin

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