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ATF-511P8 Datasheet(PDF) 2 Page - AVAGO TECHNOLOGIES LIMITED |
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ATF-511P8 Datasheet(HTML) 2 Page - AVAGO TECHNOLOGIES LIMITED |
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2 / 15 page ![]() 2 ATF-511P8 Absolute Maximum Ratings[1] Absolute Symbol Parameter Units Maximum VDS Drain–Source Voltage[2] V 7 VGS Gate–Source Voltage[2] V -5 to 1 VGD Gate Drain Voltage[2] V -5 to 1 IDS Drain Current[2] A 1 IGS Gate Current mA 46 Pdiss Total Power Dissipation[3] W 3 Pin max. RF Input Power[4] dBm +30 TCH Channel Temperature °C 150 TSTG Storage Temperature °C -65 to 150 ch_b Thermal Resistance[5] °C/W 33 Notes: 1. Operation of this device in excess of any one of these parameters may cause permanent damage. 2. Assumes DC quiescent conditions. 3. Board (package belly) temperatureTB is 25°C. Derate 30 mW/°C for TB > 50°C. 4. With 10 Ohm series resistor in gate supply and 3:1 VSWR. 5. Channel-to-board thermal resistance measured using 150°C Liquid Crystal Measurement method. 6. Device can safely handle +30dBm RF Input Power provided IGS limited to 46mA. IGS at P1dB drive level is bias circuit dependent. Product Consistency Distribution Charts at 2 GHz, 4.5V, 200 mA[6,7] OIP3 (dBm) Figure 2. OIP3 LSL = 38.5, Nominal = 41.7. 35 41 38 44 47 240 200 160 120 80 40 0 Cpk = 1.66 Stdev = 0.6 -3 Std +3 Std P1dB (dBm) Figure 3. P1dB LSL = 28.5, Nominal = 30. 28 30 29 31 200 160 120 80 40 0 Cpk = 3.24 Stdev = 0.15 -3 Std +3 Std GAIN (dB) Figure 4. Gain LSL = 13.5, Nominal = 14.8, USL = 16.5. 13 15 14 16 17 150 120 90 60 30 0 Cpk = 1.4 Stdev = 0.31 -3 Std +3 Std Notes: 6. Distribution data sample size is 400 samples taken from 4 different wafers and 3 different lots. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits. Figure 1. Typical I-V Curves (Vgs = 0.1 per step). VDS (V) 1000 900 800 700 600 500 400 300 200 100 0 02 4 6 8 0.8 V 0.7 V 0.5 V 0.6 V PAE (%) Figure 5. PAE LSL = 52, Nominal = 68.9. 52 62 57 67 72 77 82 160 120 80 40 0 Cpk = 3.03 Stdev = 1.85 -3 Std +3 Std 7. Measurements are made on production test board, which represents a trade-off between optimal OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements. |
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