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MAX3676E/D Datasheet(PDF) 9 Page - Maxim Integrated Products

Part # MAX3676E/D
Description  622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier
PDF  16 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX3676E/D Datasheet(HTML) 9 Page - Maxim Integrated Products

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622Mbps, 3.3V Clock-Recovery and
Data-Retiming IC with Limiting Amplifier
_______________________________________________________________________________________
9
The comparator is configured with an active-high LOP
output. An on-chip, 6k
Ω pull-up resistor is provided to
reduce the external part count.
Setting the Loop Filter
The MAX3676 is designed for both regenerator and
receiver applications. Its fully integrated PLL is a classic
second-order feedback system, with a loop bandwidth
(fL) fixed at 250kHz. The external capacitor, CF, can be
adjusted to set the loop damping. Figures 2 and 3 show
the open-loop and closed-loop transfer functions. The
PLL zero frequency, fZ, is a function of external capaci-
tor CF, and can be approximated according to:
For an overdamped system (fZ/fL) <0.25, the jitter peak-
ing (MP) of a second-order system can be approximat-
ed by:
For example, using CF = 0.22µF results in a jitter peak-
ing of 0.27dB. Reducing CF below 0.22µF may result in
PLL instability. The recommended value for CF is 2.2µF
to guarantee a maximum jitter peaking of less than
0.1dB.
The MAX3676 is optimally designed to acquire lock and
to provide a bit-error rate (BER) of less than 10-10 for
long strings of consecutive zeros and ones. Measured
results show that the MAX3676 can tolerate 1200 con-
secutive ones or zeros. Decreasing CF reduces the
number of tolerated consecutive identical zeros and
ones. CF must be a low-TC, high-quality capacitor of
type X7R or better.
Lock Detect
The MAX3676’s LOL monitor indicates when the PLL is
locked. Under normal operation, the loop is locked and
the LOL output signal is high. When the MAX3676 loses
lock, a fast negative-edge transition occurs on LOL.
The output level remains at a low level (held by CLOL)
until the loop reacquires lock (Figure 4).
M
=
0log 1+
P
2
f
f
Z
L


f
=
1
2
Z
π()
90 CF
100
1k
10k
100k
CF = 0.22µF
fZ = 8.04kHz
CF = 2.2µF
fZ = 804Hz
1M
10M
f (Hz)
100
1k
10k
100k
CF = 0.22µF
CF = 2.2µF
0
-3
H(J2
πf) (dB)
1M
10M
f (kHz)
Figure 2. Open-Loop Transfer Function
Figure 3. Closed-Loop Transfer Function



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