9DMV0141 datasheet(5/10 Pages) ICST

5 / 10 page

REVISION B 01/26/15

2:1 1.8V PCIE GEN1-2-3 CLOCK MUX W/ZO=100OHMS

9DMV0141 DATASHEET

Electrical Characteristics–Clock Input Parameters

Electrical Characteristics–DIF Low-Power HCSL Outputs

Electrical Characteristics–Current Consumption

TA = TAMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS NOTES

Input High Voltage - DIF_IN

VIHDIF

Differential inputs

(single-ended measurement)

300

750

1150

Input Low Voltage - DIF_IN

VILDIF

Differential inputs

(single-ended measurement)

VSS - 300

300

Input Common Mode

Voltage - DIF_IN

VCOM

Common Mode Input Voltage

200

725

Input Amplitude - DIF_IN

VSWING

Peak to Peak value (VIHDIF - VILDIF)

300

1450

Input Slew Rate - DIF_IN

dv/dt

Measured differentially

0.35

V/ns

1,2

Input Leakage Current

IIN

VIN = VDD , VIN = GND

-5

Input Duty Cycle

dtin

Measurement from differential wavefrom

Input Jitter - Cycle to Cycle

JDIFIn

Differential Measurement

150

1 Guaranteed by design and characterization, not 100% tested in production.

2 Slew rate measured through +/-75mV window centered around differential zero

TA = TAMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS NOTES

Slew rate

Trf

Scope averaging on

1.8

3.0

4.2

V/ns

1,2,3

Slew rate matching

ΔTrf

Slew rate matching, Scope averaging on

1,2,4

Voltage High

VHIGH

660

783

850

Voltage Low

VLOW

-150

150

Max Voltage

Vmax

790

1150

Min Voltage

Vmin

-300

Vswing

Scope averaging off

300

1514

1,2

Crossing Voltage (abs)

Vcross_abs

Scope averaging off

250

393

550

1,5

Crossing Voltage (var)

Δ-Vcross

Scope averaging off

140

1,6

2 Measured from differential waveform

4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on

the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the

oscilloscope is to use for the edge rate calculations.

5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising

edge (i.e. Clock rising and Clock# falling).

6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross

absolute) allowed. The intent is to limit Vcross induced modulation by setting ∆-Vcross to be smaller than Vcross absolute.

Statistical measurement on single-ended signal

using oscilloscope math function. (Scope

averaging on)

Measurement on single ended signal using

absolute value. (Scope averaging off)

1Guaranteed by design and characterization, not 100% tested in production.

3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around

differential 0V.

TA = TAMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

NOTES

Operating Supply Current

IDDOP

VDD rails, All outputs active @100MHz

7.9

Disable Current

IDDDIS

VDD rails, All outputs disabled Low/Low

1.5

2.5

1 Guaranteed by design and characterization, not 100% tested in production.

2 Input clock stopped after outputs have parked Low/Low.

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