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MAX4535CSD Datasheet(PDF) 9 Page - Maxim Integrated Products

Part # MAX4535CSD
Description  Fault-Protected, High-Voltage, Single 4-to-1/Dual 2-to-1 Multiplexers
PDF  16 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX4535CSD Datasheet(HTML) 9 Page - Maxim Integrated Products

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Fault-Protected, High-Voltage,
Single 4-to-1/Dual 2-to-1 Multiplexers
Detailed Description
The MAX4534/MAX4535 differ considerably from tradi-
tional fault-protected multiplexers, offering several
advantages. First, they are constructed with two paral-
lel FETs, allowing very low resistance when the switch
is on. Second, they allow signals on the NO_ pins that
are within or beyond the supply rails to be passed
through the switch to the COM terminal. This allows rail-
to-rail signal operation. Third, when a signal on VNO_
exceeds the supply rails (i.e., a fault condition), the
voltage on COM_ is limited to the supply rails.
Operation is identical for both fault polarities.
When the NO_ voltage goes beyond supply rails (fault
condition), the NO_ input becomes high impedance
regardless of the switch state or load resistance. When
power is removed, and the fault protection is still in
effect, the NO_ terminals are a virtual open circuit. The
fault can be up to ±40V, with V+ = V- = 0. If the switch
is on, the COM_ output current is furnished from the V+
or V- pin by “booster” FETs connected to each supply
pin. These FETs can source or sink up to 10mA.
The COM_ pins are not fault-protected. If a voltage
source is connected to any COM_ pin, it should be lim-
ited to the supply voltages. Exceeding the supply volt-
age will cause high currents to flow through the ESD
protection diodes, damaging the device (see Absolute
Maximum Ratings).
Figure 1 shows the internal construction, with the ana-
log signal paths shown in bold. A single, normally open
(NO) switch is shown. The analog switch is formed by
the parallel combination of N-channel FET N1 and P-
channel FET P1, which are driven on and off simultane-
ously, according to the input fault condition and the
logic level state.
.
Pin Descriptions
Truth Tables
NAME
FUNCTION
1
A0
Address Bit 0
2
EN
Enable Input
PIN
3
V-
Negative Supply Voltage
4
NO1
Channel Input 1 (fault protected)
10
NO4
Channel Input 4 (fault protected)
7
COM
Analog Output
6, 8, 9
N.C.
No connection
5
NO2
Channel Input 2 (fault protected)
14
A1
Address Bit 1
13
GND
Ground
12
V+
Positive Supply Voltage
11
NO3
Channel Input 3 (fault protected)
MAX4534 (Single 4-to-1 Mux)
MAX4535 (Dual 2-to-1 Mux)
NAME
FUNCTION
1
A0
Address Bit 0
2
EN
Enable Input
PIN
3
V-
Negative Supply Voltage
4
NO1A
Channel Input 1A (fault protected)
8
COMB
Mux Output B
7
COMA
Mux Output A
6, 9, 14
N.C.
No connection
5
NO2A
Channel Input 2A (fault protected)
13
GND
Ground
12
V+
Positive Supply Voltage
11
NO1B
Channel Input 1B (fault protected)
10
NO2B
Channel Input 2B (fault protected)
X
X
0
0
0
1
1
0
1
1
0
1
1
1
1
None
NO1
NO2
NO3
NO4
A0
A1
EN
ON SWITCH
MAX4534 (Single 4-to-1 Mux)
MAX4535 (Dual 2-to-1 Mux)
_______________________________________________________________________________________
9
X = Don’t care; logic 0: VAL
≤ +0.8; logic 1: VAH ≥ +2.4V
X = Don’t care; logic 0: VAL
≤ +0.8; logic 1: VAH ≥ +2.4V
COMA
EN
COMB
A0
NO2A
NO1A
None
1
1
0
NO2B
1
NO1B
0
None
X



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