CSD87334Q3D

www.ti.com

SLPS546 – JULY 2015

7.2 Layout Example

Figure 21. Recommended PCB Layout (Top Down)

7.3 Thermal Considerations

The Power Block has the ability to utilize the GND planes as the primary thermal path. As such, the use of

thermal vias is an effective way to pull away heat from the device and into the system board. Concerns of solder

voids and manufacturability problems can be addressed by the use of three basic tactics to minimize the amount

of solder attach that will wick down the via barrel:

•

Intentionally space out the vias from each other to avoid a cluster of holes in a given area.

•

Use the smallest drill size allowed in your design. The example in Figure 21 uses vias with a 10-mil drill hole

and a 16-mil capture pad.

•

Tent the opposite side of the via with solder-mask.

The number and drill size of the thermal vias should align with the PCB design rules and manufacturing

capabilities of the end user.

Copyright © 2015, Texas Instruments Incorporated

Submit Documentation Feedback

13

Product Folder Links: CSD87334Q3D