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CMX910 Datasheet(PDF) 5 Page - CML Microcircuits |
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CMX910 Datasheet(HTML) 5 Page - CML Microcircuits |
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5 / 61 page  AIS Baseband Processor CMX910 © 2009 CML Microsystems Plc 5 D/910/6 3. Signal List Package Q1 or L9 Signal Description Pin No. Name Type 1 AVSS Power Analogue negative supply rail (ground) 2 IRX1P I/P Receive “I” channel 1, positive input 3 IRX1N I/P Receive “I” channel 1, negative input 4 QRX1P I/P Receive “Q” channel 1, positive input 5 QRX1N I/P Receive “Q” channel 1, negative input 6 VBIAS O/P A bias line for the internal circuitry, held at ½ AVDD. This pin must be decoupled to AVSS by a capacitor mounted close to the device pins 7 ITXP O/P Transmit “I” channel, positive output 8 ITXN O/P Transmit “I” channel, negative output 9 QTXP O/P Transmit “Q” channel, positive output 10 QTXN O/P Transmit “Q” channel, negative output 11 AVSS Power Analogue negative supply rail (ground) 12 IRX2P I/P Receive “I” channel 2, positive input 13 IRX2N I/P Receive “I” channel 2, negative input 14 QRX2P I/P Receive “Q” channel 2, positive input 15 QRX2N I/P Receive “Q” channel 2, negative input 16 AVDD Power Analogue positive supply rail. Decouple to AVSS 17 IOVDD Power Digital I/O positive supply rail. Decouple to DVSS 18 ENAB0 O/P Enable output 0 19 ENAB1 O/P Enable output 1 20 ENAB2 O/P Enable output 2 21 ENAB3 O/P Enable output 3 22 ENAB4 O/P Enable output 4 23 ENAB5 O/P Enable output 5 24 DVSS Power Digital negative supply rail (ground) 25 FSK_MUTE I/P FSK RF squelch indicator 26 FSK_DET I/P FSK baseband energy detect indicator 27 FSK_RXD I/P Raw FSK demodulator input data 28 REFCLK I/P Master input clock (multiple of 2.4MHz) 29 RESETN I/P Active low chip reset 30 UTC1PPS I/P 1Hz UTC sync pulse, typically from GNSS receiver 31 SLOTCLKN O/P Slot clock output (active low), pulses at the start of each AIS slot. Configurable as a ‘wire-ORable’ output, requiring an external pullup resistor, or as an active pullup/pulldown. 32 IRQN O/P A ‘wire-ORable’ output for connection to the host µC's Interrupt Request input. This output has a low impedance pull down to DVSS when active and is high impedance when inactive. An external pullup resistor is required. |
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