HIP4086, HIP4086A

4

FN4220.10

March 27, 2015

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17

24

14

AHO

BHO

CHO

(xHO)

High-Side Outputs. Connect to the gates of the high-side power MOSFETs in each phase.

20

VDD

Positive Supply. Decouple this pin to VSS (Pin 6).

21

22

19

ALO

BLO

CLO

(xLO)

Low-Side Outputs. Connect the gates of the low-side power MOSFETs to these pins.

NOTE: x = A, B or C.

PIN NUMBER

SYMBOL

DESCRIPTION

Ordering Information

PART NUMBER

(Note 3)

PART

MARKING

TEMP RANGE

(°C)

CHARGE

PUMP

PACKAGE

PKG.

DWG. #

HIP4086AB (Note 1)

HIP4086AB

-40 to +125

Yes

24 Ld SOIC

M24.3

HIP4086ABZ (Notes 1, 2)

HIP4086ABZ

-40 to +125

Yes

24 Ld SOIC (Pb-free)

M24.3

HIP4086APZ (Note 2)

HIP4086APZ

-40 to +125

Yes

24 Ld PDIP (Pb-free)

E24.3

HIP4086AABZ (Notes 1, 2) HIP4086AABZ

-40 to +125

No

24 Ld SOIC (Pb-free)

M24.3

HIP4086DEMO1Z

HIP4086 Demonstration Board

NOTES:

1. Add “T*”, suffix for tape and reel. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte

tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil

Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for HIP4086, HIP4086A. For more information on MSL, please see Technical

Brief TB363.