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1EDI2002AS Datasheet(PDF) 83 Page - Infineon Technologies AG |
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1EDI2002AS Datasheet(HTML) 83 Page - Infineon Technologies AG |
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83 / 147 page ![]() EiceDRIVER ™ SIL 1EDI2002AS Register Description Datasheet 83 Rev. 3.1, 2015-07-30 Hardware Description 4.1 Primary Register Description Primary ID Register This register contains the identification number of the primary chip version. PID Offset Wakeup Value Reset Value Primary ID Register 00 H n.a. xxxx H Field Bits Type Description PVERS 15:4 r Primary Chip Identification This bit field defines the version of the primary chip. This bit field is hard-wired: 4A3 H: AD Step. 0 3:2 r Reserved Read as 0 B. LMI 1 rh Last Message Invalid Notification This bit indicates if the last received SPI Message was correctly processed by the device. 0 B: Previous Message was processed correctly. 1 B: Previous Message was discarded. P 0 rh Parity Bit Odd Parity Bit. 15 8 7 0 15 r PVERS 74 r PVERS 32 r 0 11 rh LMI 00 rh P |
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