MIC5013

Micrel

MIC5013

6

July 2000

Block Diagram

+

–

V+

CHARGE

PUMP

V. REG

R

S

Q

LOGIC

MIC5013

1

8

52

4

3

6

7

500

Ω

1k

V+

Gate

Sense

Source

Ground

Threshold

Input

Fault

CURRENT

SENSE

LATCH

1k

+

–

I2

12.5V

Applications Information

Functional Description (refer to block diagram)

The various MIC5013 functions are controlled via a logic

block connected to the input pin 1. When the input is low, all

functions are turned off for low standby current and the gate

of the power MOSFET is also held low through 500

Ω to an

N-channel switch. When the input is taken above the turn-

on threshold (3.5V typical), the N-channel switch turns off

and the charge pump is turned on to charge the gate of the

power FET. A bandgap type voltage regulator is also turned

on which biases the current sense circuitry.

The charge pump incorporates a 100kHz oscillator and on-

chip pump capacitors capable of charging 1nF to 5V above

supply in 60

µs typical. The charge pump is capable of

pumping the gate up to over twice the supply voltage. For

this reason, a zener clamp (12.5V typical) is provided

between the gate pin 6 and source pin 4 to prevent exceed-

ing the V

The current sense operates by comparing the sense volt-

age at pin 3 to an offset version of the source voltage at pin

4. Current I2 flowing in threshold pin 2 is mirrored and

returned to the source via a 1k

Ω resistor to set the offset, or

trip voltage. When (V

current sense trips and sets the current sense latch to turn

off the power FET. An integrating comparator is used to

reduce sensitivity to spikes on pin 3. The latch is reset to turn

the FET back on by “recycling” the input pin 1 low and then

high again.

A resistor R

An additional capacitor C

higher trip voltage at turn-on, which is necessary to prevent

high in-rush current loads such as lamps or capacitors from

false-tripping the current sense.

When the current sense has tripped, the fault pin 8 will be

high as long as the input pin 1 remains high. However, when

the input is low the fault pin will also be low.

Construction Hints

High current pulse circuits demand equipment and assem-

bly techniques that are more stringent than normal low

current lab practices. The following are the sources of

pitfalls most often encountered during prototyping: Sup-

plies: many bench power supplies have poor transient

response. Circuits that are being pulse tested, or those that

operate by pulse-width modulation will produce strange

results when used with a supply that has poor ripple

rejection, or a peaked transient response. Monitor the

power supply voltage that appears at the drain of a high-

side driver (or the supply side of the load in a low-side driver)

with an oscilloscope. It is not uncommon to find bench

power supplies in the 1kW class that overshoot or under-

shoot by as much as 50% when pulse loaded. Not only will

the load current and voltage measurements be affected, but

it is possible to over-stress various components—espe-

cially electrolytic capacitors—with possibly catastrophic

results. A 10

µF supply bypass capacitor at the chip is

recommended.

Residual Resistances: Resistances in circuit connections

may also cause confusing results. For example, a circuit

may employ a 50m

Ω power MOSFET for low drop, but

careless construction techniques could easily add 50 to

100m

Ω resistance. Do not use a socket for the MOSFET. If

the MOSFET is a TO-220 type package, make high-current

drain connections to the tab. Wiring losses have a profound

effect on high-current circuits. A floating millivoltmeter can

identify connections that are contributing excess drop un-

der load.