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MIC59P50BWM Datasheet(PDF) 1 Page - Micrel Semiconductor |
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MIC59P50BWM Datasheet(HTML) 1 Page - Micrel Semiconductor |
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1 / 5 page ![]() MIC59P50 Micrel 7-58 October 1998 IN Circuitry below dashed line is included in each of the 8 channels. STROBE VDD 2.2R 1.25V R + – UVLO CLEAR ENABLE/RESET ISHUTDOWN COMMON S R Q R1 70k R2 3k VEE OUTPUT THERMAL SHUTDOWN IREF IOUT / N FLAG + – General Description The MIC59P50 parallel-input latched driver is a high-voltage (80V), high-current (500mA) integrated circuit comprised of eight CMOS data latches, a bipolar Darlington transistor driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, and OUTPUT ENABLE func- tions. Similar to the MIC5801, additional protection circuitry supplied on this device includes thermal shutdown, under voltage lockout (UVLO), and over-current shutdown. The bipolar/MOS combination provides an extremely low- power latch with maximum interface flexibility. The MIC59P50 has open-collector outputs capable of sinking 500mA and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80V above V EE (50V sustaining). The drivers can be operated with a split supply, where the negative supply is down to –20V and may be paralleled for higher load current capability. With a 5V logic supply, the MIC59P50 will typically operate at better than 5MHz. With a 12V logic supply, significantly higher speeds are obtained. The CMOS inputs are compat- ible with standard CMOS, PMOS, and NMOS circuits. TTL circuits may require pull-up resistors. Each of these eight outputs has an independent over-current shutdown at 500 mA. Upon current shutdown, the affected channel will turn OFF and the flag will go low until VDD is cycled or the ENABLE/RESET pin is pulsed high. Current pulses less than 2 µs will not activate over-current shutdown. Temperatures above 165 °C will shut down the device and activate the open collector FLAG output at pin 1. The UVLO circuit disables the outputs at low V DD; hysteresis of 0.5V is provided. Ordering Information Part Number Temperature Range Package MIC59P50BN –40 °C to +85°C 24-Pin Plastic DIP* MIC59P50BV –40 °C to +85°C 28-Pin PLCC MIC59P50BWM –40 °C to +85°C 24-Pin Wide SOIC Features • 4.4 MHz Minimum Data Input Rate • High-Voltage, High-Current Outputs • Per-Output Over-Current Shutdown (500mA Typical) • Undervoltage Lockout • Thermal Shutdown • Output Fault Flag • Output Transient Protection Diodes • CMOS, PMOS, NMOS, and TTL Compatible Inputs • Internal Pull-Down Resistors • Low-Power CMOS Latches • Single or Split Supply Operation Functional Diagram Pin Configuration (DIP and SOIC) * 300-mil “skinny DIP” MIC59P50 8-Bit Parallel-Input Protected Latched Driver 12 11 10 9 8 7 6 5 4 3 2 1 UVLO ILIMIT THERMAL SHUTDOWN 13 14 15 16 17 18 19 20 21 22 23 24 VEE IN 8 IN 7 IN 6 IN 5 IN 4 IN 3 IN 2 IN 1 CLEAR FLAG STROBE VSS ENABLE/RESET VDD OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 OUT 8 COMMON OUTPUT |
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