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27C128 Datasheet(PDF) 5 Page - Microchip Technology |
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27C128 Datasheet(HTML) 5 Page - Microchip Technology |
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5 / 12 page ![]() © 1996 Microchip Technology Inc. DS11003K-page 5 27C128 FIGURE 1-2: PROGRAMMING WAVEFORMS (1) TABLE 1-6: MODES Operation Mode CE OE PGM VPP A9 O0 - O7 Read VIL VIL VIH VCC XDOUT Program VIL VIH VIL VH XDIN Program Verify VIL VIL VIH VH XDOUT Program Inhibit VIH XX VH X High Z Standby VIH XX VCC X High Z Output Disable VIL VIH VIH VCC X High Z Identity VIL VIL VIH VCC VH Identity Code X = Don’t Care VIH VIL VIH VIL 13.0 V (3) 5.0 V 6.5 V (3) 5.0 V VIH VIL VIH VIL VIH VIL Address Data VPP VCC CE PGM OE Address Stable tAH tDS tDH tVPS tDF (2) tAS Program Data In Stable Data Out Valid Verify tVCS The input timing reference is 0.8V for VIL and 2.0V for VIH. tDF and tOE are characteristics of the device but must be accommodated by the programmer. Vcc = 6.5V ±0.25V, VPP = VH = 13.0V ±0.25V for Express algorithm. Notes: (1) (2) (3) tPW tOPW tOES tOE (2) tCES High Z 1.2 Read Mode (See Timing Diagrams and AC Characteristics) Read Mode is accessed when a) the CE pin is low to power up (enable) the chip b) the OE pin is low to gate the data to the output pins For Read operations, if the addresses are stable, the address access time (tACC) is equal to the delay from CE to output (tCE). Data is transferred to the output after a delay from the falling edge of OE (tOE). |
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