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PIC16C72-10/SS Datasheet(PDF) 77 Page - Microchip Technology |
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PIC16C72-10/SS Datasheet(HTML) 77 Page - Microchip Technology |
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77 / 124 page  PIC16C72 Series © 1998 Microchip Technology Inc. Preliminary DS39016A-page 77 13.0 ELECTRICAL CHARACTERISTICS - PIC16C72 SERIES Absolute Maximum Ratings † Parameter PIC16C72 PIC16CR72 Ambient temperature under bias -55 to +125˚C -55 to +125˚C Storage temperature -65˚C to +150˚C -65˚C to +150˚C Voltage on any pin with respect to VSS (except VDD, MCLR, and RA4) -0.3V to (VDD + 0.3V) -0.3V to (VDD + 0.3V) Voltage on VDD with respect to VSS -0.3 to +7.5V TBD Voltage on MCLR with respect to VSS (Note 1) -0.3 to +14V TBD Voltage on RA4 with respect to Vss -0.3 to +14V TBD Total power dissipation (Note 2) 1.0W 1.0W Maximum current out of VSS pin 300 mA 300 mA Maximum current into VDD pin 250 mA 250 mA Input clamp current, IIK (VI < 0 or VI > VDD) ± 20 mA ± 20 mA Output clamp current, IOK (VO < 0 or VO > VDD) ± 20 mA ± 20 mA Maximum output current sunk by any I/O pin 25 mA 25 mA Maximum output current sourced by any I/O pin 25 mA 25 mA Maximum current sunk by PORTA and PORTB (combined) 200 mA 200 mA Maximum current sourced by PORTA and PORTB (combined) 200 mA 200 mA Maximum current sunk by PORTC 200 mA 200 mA Maximum current sourced by PORTC 200 mA 200 mA 1. Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latch-up. Thus, a series resistor of 50-100 Ω should be used when applying a “low” level to the MCLR pin rather than pulling this pin directly to VSS. 2. Power dissipation is calculated as follows: Pdis = VDD x {IDD - ∑ IOH} + ∑ {(VDD - VOH) x IOH} + ∑(VOl x IOL). † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation list- ings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. |
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