PIC16C641-04ESLASHP datasheet(98/136 Pages) MICROCHIP

98 / 136 page

PIC16C64X & PIC16C66X

DS30559A-page 98

Preliminary

12.5

Timing Diagrams and Speciﬁcations

FIGURE 12-2: EXTERNAL CLOCK TIMING

TABLE 12-4:

EXTERNAL CLOCK TIMING REQUIREMENTS

Param

No.

Sym

Characteristic

Min

Typ†

Max

Units

Conditions

Fosc

External CLKIN Frequency(1)

—

MHz

XT and RC osc mode,

VDD = 5.0V

—

MHz

HS osc mode

—

200

kHz

LP osc mode

Oscillator Frequency (1)

—

MHz

RC osc mode, VDD = 5.0V

0.1

—

MHz

XT osc mode

—

MHz

HS osc mode

–

200

kHz

LP osc mode

Tosc

External CLKIN Period(1)

250

—

XT and RC osc mode

—

HS osc mode

5—

—

µs

LP osc mode

Oscillator Period(1)

250

—

RC osc mode

250

—

10,000 ns

XT osc mode

—

250

HS osc mode

5—

—

µs

LP osc mode

2TCY

Instruction Cycle Time(1)

200

—

TCY = FOSC/4

TosL,

TosH

External Clock in (OSC1)

High or Low Time

100

—

XT osc mode

2.5

—

µs

LP osc mode

—

HS osc mode

TosR,

TosF

External Clock in (OSC1)

Rise or Fall Time

—

XT osc mode

—

LP osc mode

—

HS osc mode

* These parameters are characterized but not tested.

† Data in “Typ” column is at 5.0V, 25

°C unless otherwise stated. These parameters are for design guidance only

and are not tested.

Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All speciﬁed values are

based on characterization data for that particular oscillator type under standard operating conditions with

the device executing code. Exceeding these speciﬁed limits may result in an unstable oscillator operation

and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an

external clock applied to the OSC1 pin.

When an external clock input is used, the “Max.” cycle time limit is “DC” (no clock) for all devices.

OSC1

CLKOUT

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