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PIC16F628A-I/P Datasheet(PDF) 69 Page - Microchip Technology |
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PIC16F628A-I/P Datasheet(HTML) 69 Page - Microchip Technology |
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69 / 168 page ![]() 2002 Microchip Technology Inc. Preliminary DS40044A-page 67 PIC16F627A/628A/648A 11.0 VOLTAGE REFERENCE MODULE The Voltage Reference is a 16-tap resistor ladder network that provides a selectable voltage reference. The resistor ladder is segmented to provide two ranges of V REF values and has a power-down function to conserve power when the reference is not being used. The VRCON register controls the operation of the reference as shown in Figure 11-1. The block diagram is given in Figure 11-1. 11.1 Voltage Reference Configuration The Voltage Reference can output 16 distinct voltage levels for each range. The equations used to calculate the output of the Voltage Reference are as follows: if V RR = 1: if V RR = 0: The setting time of the Voltage Reference must be considered when changing the V REF output (Table 17-3). Example 11-1 demonstrates how Voltage Reference is configured for an output voltage of 1.25V with V DD = 5.0V. REGISTER 11-1: VRCON REGISTER (ADDRESS: 9Fh) FIGURE 11-1: VOLTAGE REFERENCE BLOCK DIAGRAM V REF V R<3:0> 24 ---------------------- V DD × = V REF V DD 1 4 --- × VR<3:0> 32 ---------------------- +V DD × = R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 V REN V ROE V RR —V R3VR2VR1VR0 bit 7 bit 0 bit 7 V REN: VREF Enable 1 = VREF circuit powered on 0 = VREF circuit powered down, no IDD drain bit 6 V ROE: VREF Output Enable 1 = VREF is output on RA2 pin 0 = VREF is disconnected from RA2 pin bit 5 V RR: VREF Range selection 1 = Low Range 0 = High Range bit 4 Unimplemented: Read as '0' bit 3-0 V R<3:0>: VREF value selection 0 ≤ VR [3:0] ≤ 15 When V RR = 1: VREF = (VR<3:0>/ 24) * VDD When V RR = 0: VREF = 1/4 * VDD + (VR<3:0>/ 32) * VDD Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown Note: R is defined in Table 17-3. VRR 8R VR3 VR0 (From VRCON<3:0>) 16-1 Analog Mux 8R R R R R VREN VREF 16 Stages VDD VSS VSS |
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