| Electronic Components Datasheet Search |
|
PIC18F010T Datasheet(PDF) 37 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F010T Datasheet(HTML) 37 Page - Microchip Technology |
|
37 / 176 page ![]() 2001 Microchip Technology Inc. Preliminary DS41142A-page 35 PIC18F010/020 TABLE 4-1: REGISTER FILE SUMMARY (PIC18F010/020) File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on All Other RESETS (Note 1) FFEh TOSH Top-of-Stack High Byte (TOS<11:8>) ---- 0000 ---- 0000 FFDh TOSL Top-of-Stack Low Byte (TOS<7:0>) 0000 0000 0000 0000 FFCh STKPTR STKOVF STKUNF — Return Stack Pointer 00-0 0000 00-0 0000 FFBh PCLATU — — bit21(3) Holding Register for PC<20:18> — — --00 00-- --00 00-- FFAh PCLATH — — — — Holding Register for PC<11:8> ---- 0000 ---- 0000 FF9h PCL PC Low Byte (PC<7:0>) 0000 0000 0000 0000 FF8h TBLPTRU — — bit21(2) Program Memory Table Pointer Upper Byte (TBLPTR<20:18>) — — ---0 0000 ---0 0000 FF7h TBLPTRH — — — — Program Memory Table Pointer High Byte (TBLPTR<11:8>) 0000 0000 0000 0000 FF6h TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>) 0000 0000 0000 0000 FF5h TABLAT Program Memory Table Latch 0000 0000 0000 0000 FF4h PRODH Product Register High Byte xxxx xxxx uuuu uuuu FF3h PRODL Product Register Low Byte xxxx xxxx uuuu uuuu FF2h INTCON GIE/GIEH PEIE/GIEL T0IE INT0E RBIE T0IF INT0F RBIF 0000 000x 0000 000u FF1h INTCON2 RBPU INTEDG0 — — — T0IP — RBIP 11-- -1-1 11-- -1-1 FEFh INDF0 Uses contents of FSR0 to address data memory - value of FSR0 not changed (not a physical register) N/A N/A FEEh POSTINC0 Uses contents of FSR0 to address data memory - value of FSR0 post-incremented (not a physical register) N/A N/A FEDh POSTDEC0 Uses contents of FSR0 to address data memory - value of FSR0 post-decremented (not a physical register) N/A N/A FECh PREINC0 Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register) N/A N/A FEBh PLUSW0 Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register) - value of FSR0 offset by W N/A N/A FEAh FSR0H — — — — Indirect Data Memory Address Pointer 0 High ---- 0000 ---- 0000 FE9h FSR0L Indirect Data Memory Address Pointer 0 Low Byte xxxx xxxx uuuu uuuu FE8h WREG Working Register xxxx xxxx uuuu uuuu FE7h INDF1 Uses contents of FSR1 to address data memory - value of FSR1 not changed (not a physical register) N/A N/A FE6h POSTINC1 Uses contents of FSR1 to address data memory - value of FSR1 post-incremented (not a physical register) N/A N/A FE5h POSTDEC1 Uses contents of FSR1 to address data memory - value of FSR1 post-decremented (not a physical register) N/A N/A FE4h PREINC1 Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register) N/A N/A FE3h PLUSW1 Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register) - value of FSR1 offset by W N/A N/A FE2h FSR1H — — — — Indirect Data Memory Address Pointer 1 High ---- 0000 ---- 0000 FE1h FSR1L Indirect Data Memory Address Pointer 1 Low Byte xxxx xxxx uuuu uuuu FE0h BSR — — — — Bank Select Register ---- 0000 ---- 0000 FDFh INDF2 Uses contents of FSR2 to address data memory - value of FSR2 not changed (not a physical register) N/A N/A FDEh POSTINC2 Uses contents of FSR2 to address data memory - value of FSR2 post-incremented (not a physical register) N/A N/A FDDh POSTDEC2 Uses contents of FSR2 to address data memory - value of FSR2 post-decremented (not a physical register) N/A N/A FDCh PREINC2 Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register) N/A N/A FDBh PLUSW2 Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register) - value of FSR2 offset by W N/A N/A FDAh FSR2H — — — — Indirect Data Memory Address Pointer 2 High ---- 0000 ---- 0000 FD9h FSR2L Indirect Data Memory Address Pointer 2 Low Byte xxxx xxxx uuuu uuuu FD8h STATUS — — — NOV Z DC C ---x xxxx ---u uuuu FD7h TMR0H Timer0 Register High Byte 0000 0000 0000 0000 FD6h TMR0L Timer0 Register Low Byte xxxx xxxx uuuu uuuu FD5h T0CON TMR0ON T08BIT T0CS T0SE T0PS3 T0PS2 T0PS1 T0PS0 1111 1111 1111 1111 Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition Note 1: These registers can only be modified when the combination lock is open. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |