PIC18F2220-ISLASHML datasheet(13/388 Pages) MICROCHIP

13 / 388 page

 2003 Microchip Technology Inc.

DS39599C-page 11

PIC18F2220/2320/4220/4320

TABLE 1-2:

PIC18F2220/2320 PINOUT I/O DESCRIPTIONS

Pin Name

Pin Number Pin

Type

Buffer

Type

Description

PDIP SOIC

MCLR/VPP/RE3

MCLR

VPP

RE3

Master Clear (input) or programming voltage (input).

Master Clear (Reset) input. This pin is an active-low Reset

to the device.

Programming voltage input.

Digital input.

OSC1/CLKI/RA7

OSC1

CLKI

RA7

I/O

CMOS

TTL

Oscillator crystal or external clock input.

Oscillator crystal input or external clock source input.

ST buffer when configured in RC mode, CMOS otherwise.

External clock source input. Always associated with pin

function OSC1. (See related OSC1/CLKI, OSC2/CLKO pins.)

General purpose I/O pin.

OSC2/CLKO/RA6

OSC2

CLKO

RA6

I/O

—

TTL

Oscillator crystal or clock output.

Oscillator crystal output. Connects to crystal or resonator

in Crystal Oscillator mode.

In RC mode, OSC2 pin outputs CLKO which has 1/4 the

frequency of OSC1 and denotes the instruction cycle rate.

General purpose I/O pin.

PORTA is a bidirectional I/O port.

RA0/AN0

RA0

AN0

I/O

TTL

Analog

Digital I/O.

Analog input 0.

RA1/AN1

RA1

AN1

I/O

TTL

Analog

Digital I/O.

Analog input 1.

RA2/AN2/VREF-/CVREF

RA2

AN2

VREF-

CVREF

I/O

TTL

Analog

Digital I/O.

Analog input 2.

A/D Reference Voltage (Low) input.

Comparator Reference Voltage output.

RA3/AN3/VREF+

RA3

AN3

VREF+

I/O

TTL

Analog

Digital I/O.

Analog input 3.

A/D Reference Voltage (High) input.

RA4/T0CKI/C1OUT

RA4

T0CKI

C1OUT

I/O

ST/OD

—

Digital I/O. Open-drain when configured as output.

Timer0 external clock input.

Comparator 1 output.

RA5/AN4/SS/LVDIN/C2OUT

RA5

AN4

LVDIN

C2OUT

I/O

TTL

Analog

TTL

Analog

—

Digital I/O.

Analog input 4.

SPI Slave Select input.

Low-Voltage Detect input.

Comparator 2 output.

RA6

See the OSC2/CLKO/RA6 pin.

RA7

See the OSC1/CLKI/RA7 pin.

Legend: TTL = TTL compatible input

CMOS = CMOS compatible input or output

= Schmitt Trigger input with CMOS levels

= Input

= Output

= Power

OD = Open-drain (no diode to VDD)

Note 1:

Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.

Alternate assignment for CCP2 when CCP2MX is cleared.

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