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LM5017 Datasheet(PDF) 21 Page - Texas Instruments

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Part # LM5017
Description  100-V, 600-mA Constant On-Time Synchronous Buck Regulator
PDF  31 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM5017 Datasheet(HTML) 21 Page - Texas Instruments

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VIN(UVLO, rising) = 1.225V x
RUV2
+ 1
)
(
RUV1
VIN (HYS) = IHYS x RUV2
OUT(MA
IN
X)
IN
I
C
4
¦
9
K 
J
K
N2
N1
VD1 =
VIN
LM5017
www.ti.com
SNVS783I – JANUARY 2012 – REVISED OCTOBER 2015
The calculated value for Rr is 66 k
Ω. This value provides the minimum ripple for stable operation. A smaller
resistance should be selected to allow for variations in TON, COUT1 and other components. For this design, Rr
value of 46.4 k
Ω is selected.
8.2.2.2.9
Secondary Diode
The reverse voltage across secondary-rectifier diode D1 when the high-side buck switch is off can be calculated
using Equation 31.
(31)
For a VIN_MAX of 95 V and the 1:1 turns ratio of this design, a 100 V Schottky is selected.
8.2.2.2.10
VCC and Bootstrap Capacitor
A 1-µF capacitor of 16 V or higher rating is recommended for the VCC regulator bypass capacitor.
A good value for the BST pin bootstrap capacitor is 0.01-µF with a 16 V or higher rating.
8.2.2.2.11
Input Capacitor
The input capacitor is typically a combination of a smaller bypass capacitor located near the regulator IC and a
larger bulk capacitor. The total input capacitance should be large enough to limit the input voltage ripple to a
desired amplitude. For input ripple voltage
ΔVIN, CIN can be calculated using Equation 32.
(32)
Choosing a
ΔVIN of 0.5 V gives a minimum CIN of 0.2 μF. A standard value of 0.47 μF is selected for CBYP in this
design. A bulk capacitor of higher value reduces voltage spikes due to parasitic inductance between the power
source to the converter. A standard value of 2.2
μF is selected for CIN in this design. The voltage ratings of the
two input capacitors should be greater than the maximum input voltage under all conditions.
8.2.2.2.12
UVLO Resistors
UVLO resistors RUV1 and RUV2 set the undervoltage lockout threshold and hysteresis according to Equation 33
and Equation 34.
(33)
(34)
Where IHYS = 20 μA, typical.
For a UVLO hysteresis of 2.5 V and UVLO rising threshold of 20 V, Equation 33 and Equation 34 require RUV1 of
8.25 k
Ω and RUV2 of 127 kΩ and these values are selected for this design example.
8.2.2.2.13
VCC Diode
Diode D2 is an optional diode connected between VOUT1 and the VCC regulator output pin. When VOUT1 is more
than one diode drop greater than the VCC voltage, the VCC bias current is supplied from VOUT1. This results in
reduced power losses in the internal VCC regulator which improves converter efficiency. VOUT1 must be set to a
voltage at least one diode drop higher than 8.55 V (the maximum VCC voltage) if D2 is used to supply bias
current.
Copyright © 2012–2015, Texas Instruments Incorporated
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