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TPS65279V Datasheet(PDF) 22 Page - Texas Instruments

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Part # TPS65279V
Description  4.5-V TO 18-V INPUT VOLTAGE, 5-A/5-A DUAL SYNCHRONOUS STEP-DOWN CONVERTER WITH I2C CONTROLLED VID AND CURRENT SHARING
PDF  46 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS65279V Datasheet(HTML) 22 Page - Texas Instruments

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TPS65279V
SLVSBW1B – FEBRUARY 2013 – REVISED JANUARY 2014
www.ti.com
DETAILED DESCRIPTION
Adjusting the Output Voltage
The output voltage is set with a resistor divider from the output node (VOUT) to the FB pin. It is recommended to
use 1% tolerance or better divider resistors.
Figure 41. Voltage Divider Circuit
(1)
Start with a 40.2-k
Ω for R1 and use Equation 1 to calculate R2. To improve efficiency at light loads consider
using larger value resistors. If the values are too high, the regulator is more susceptible to noise and voltage
errors from the FB input current are noticeable.
Output voltage can also be changed by I2C controlled VID in a 7-bit register.
The minimum output voltage and maximum output voltage can be limited by the minimum on time of the high-
side MOSFET and bootstrap voltage (BOOT-PH voltage) respectively. More discussions are located in Minimum
Output Voltage and Bootstrap Voltage (BOOT) and Low Dropout Operation.
Enable and Adjusting Under-Voltage Lockout
The EN pin provides electrical on/off control of the device. Once the EN pin voltage exceeds the threshold
voltage, the device starts operation. If the EN pin voltage is pulled below the threshold voltage, the regulator
stops switching and enters low Iq state.
The EN pin has an internal pull-up current source, allowing the user to float the EN pin for enabling the device. If
an application requires controlling the EN pin, use open drain or open collector output logic to interface with the
pin.
The device implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage
falls below the internal VIN UVLO threshold. The internal VIN UVLO threshold has a hysteresis of 500mV.
If an application requires either a higher UVLO threshold on the VIN pin or a secondary UVLO on the PVIN, in
split rail applications, then the EN pin can be configured as shown in Figure 42.
When using the external UVLO function it is recommended to set the hysteresis to be greater than 500 mV.
The EN pin has a small pull-up current IP which sets the default state of the pin to enable when no external
components are connected. The pull-up current is also used to control the voltage hysteresis for the UVLO
function since it increases by Ih once the EN pin crosses the enable threshold. The UVLO thresholds can be
calculated using Equation 2 and Equation 3.
22
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Copyright © 2013–2014, Texas Instruments Incorporated
Product Folder Links: TPS65279V



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