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ACE721E Datasheet(PDF) 7 Page - ACE Technology Co., LTD.

Part # ACE721E
Description  1A, 1.5MHz Step-Down Converter
PDF  10 Pages
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Manufacturer  ACE [ACE Technology Co., LTD.]
Direct Link  http://www.ace-ele.com
Logo ACE - ACE Technology Co., LTD.

ACE721E Datasheet(HTML) 7 Page - ACE Technology Co., LTD.

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ACE721E
1A, 1.5MHz Step-Down Converter
VER 1.3
7
UVLO and Thermal Shutdown
If IN drops below 2.4V, the UVLO circuit inhibits switching. Once IN rises above 2.6V, the UVLO clears,
and the soft-start sequence activates. Thermal-overload protection limits total power dissipation in the
device. When the junction temperature exceeds TJ=+160°C, a thermal sensor forces the device into
shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction
temperature cools by 15°C, resulting in a pulsed output during continuous overload conditions. Following
a thermal-shutdown condition, the soft-start sequence begins.
DESIGN PROCEDURE
Setting Output Voltages
Output voltages are set by external resistors. The FB threshold is 0.6V.
RTOP = RBOTTOM x [(VOUT / 0.6) - 1]
Input Capacitor and Output Capacitor Selection
The input capacitor in a DC-to-DC converter reduces current peaks drawn from
the battery or other
input power source and reduces switching noise in the controller. The impedance of the input capacitor at
the switching frequency should be less than that of the input source so high-frequency switching currents
do not pass through the input source. Input ripple with a ceramic capacitor is approximately as follows:
VRIPPLE = IL(PEAK)[1 / (2π
x fOSC x CIN)]
If the capacitor has significant ESR, the output ripple component due to capacitor ESR is as follows:
VRIPPLE(ESR) = IL(PEAK) x ESR
The output capacitor keeps output ripple small and ensures control-loop stability. The output capacitor
must also have low impedance at the switching frequency. Ceramic, polymer, and tantalum capacitors are
suitable, with ceramic exhibiting the lowest ESR and high-frequency impedance.
Inductor Selection
A reasonable inductor value (LIDEAL) can be derived from the following:
LIDEAL = [2(VIN) x D(1 - D)] / IOUT x fOSC
PCB LAYOUT GUIDE
PCB layout is very important to achieve stable operation. It is highly recommended to duplicate EVB
layout for optimum performance.
If change is necessary, please follow these guidelines and take Figure for reference.
1) Keep the path of switching current short and minimize the loop area formed by input cap, high-side
MOSFET and low-side MOSFET.
2) Bypass ceramic capacitors are suggested to be put close to the Vin pin.
3) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation
components as close to the chip as possible.
4) Rout SW away from sensitive analog areas such as FB.
5) Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve
thermal performance and long-term reliability.



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