SM5852FS datasheet(10/12 Pages) NPC

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SM5852FS

NIPPON PRECISION CIRCUITS—10

FUNCTIONAL DESCRIPTION

DDBB (Digital Dynamic Bass Boost)

The DDBB function emphasizes the low-frequency

components of the input signal by picking out the

low-frequency

components

and

passing

them

through a DDBB 3rd-order IIR low-pass ﬁlter and

then changing the gain for the low-frequency

components.

Two independent DDBB ﬁlters are used, one for

each the left and right channels, to maintain full

channel separation. The DDBB boost is determined

by DB/DS, MOD1 and MOD2.

Soft Muting

Soft muting is active when MUTEN is LOW. When

MUTEN is LOW, the attenuation changes smoothly

from 0 to

−∞ dB in 1024/fs, or approximately 23.2

ms.

When MUTEN goes HIGH, soft muting is released

and the attenuation changes smoothly from

−∞ to 0

dB, again taking approximately 23.2 ms.

Also, if a MUTEN transition occurs while the

attenuation is changing, the attenuation then changes

smoothly in the direction speciﬁed by the new level

of MUTEN.

DB/DS Switching Shock Noise

The soft muting function is also activated to

eliminate switching shock noise when DB/DS

changes state. When DB/DS changes state, the

attenuation changes to

−∞ dB, the internal circuit

settings are activated and then soft muting is

released.

Therefore,

maximum

time

approximately 46.4 ms is required to change the

compression mode. Of course, if the attenuation is

already

−∞ dB after soft muting using MUTEN, then

no time is required to change compression mode.

Reset Initialization

RSTN should be set LOW at power-ON and after

reacquiring synchronization. Note that if RSTN is

LOW for longer than 1 µs, a through-current ﬂows in

the LSI’s internal dynamic circuits because the

internal clock is stopped. The through-current has no

rated value, so the reset pulse should be kept as short

as possible at all times other than at power-ON.

When RSTN goes from LOW to HIGH, initialization

hold is released and the initialization routine ﬁrst

resets the internal data over an interval of 4fs. During

the initialization routine, the output data is forcibly

muted so that there is no output signal.

MOD1

MOD2

DB/DS

Gain mode

LOW

18 dB

LOW

HIGH

16 dB

LOW

HIGH

LOW

14 dB

LOW

HIGH

12 dB

HIGH

LOW

10 dB

HIGH

LOW

HIGH

6 dB

HIGH

LOW

Off

HIGH

Off

SM5852FS Datasheet(PDF) 10 Page - Nippon Precision Circuits Inc

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