LMV321M7SLASHNOPB datasheet(18/52 Pages) TI1

18 / 52 page

LMV321-N, LMV321-N-Q1, LMV358-N

LMV358-N-Q1, LMV324-N, LMV324-N-Q1

SNOS012J – AUGUST 2000 – REVISED DECEMBER 2014

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Feature Description (continued)

Figure 50. Pulse Response of the LMV324 Circuit in Figure 49

The circuit in Figure 51 is an improvement to the one in Figure 49 because it provides DC accuracy as well as

AC stability. If there were a load resistor in Figure 49, the output would be voltage divided by RISO and the load

resistor. Instead, in Figure 51, RF provides the DC accuracy by using feed-forward techniques to connect VIN to

RL. Caution is needed in choosing the value of RF due to the input bias current of theLMV321-N/LMV358-

N/LMV324-N. CF and RISO serve to counteract the loss of phase margin by feeding the high frequency

component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the

overall feedback loop. Increased capacitive drive is possible by increasing the value of CF . This in turn will slow

down the pulse response.

Figure 51. Indirectly Driving A Capacitive Load with DC Accuracy

8.3.2 Input Bias Current Cancellation

The LMV321-N/LMV358-N/LMV324-N family has a bipolar input stage. The typical input bias current of LMV321-

N/LMV358-N/LMV324-N is 15 nA with 5V supply. Thus a 100 k

Ω input resistor will cause 1.5 mV of error voltage.

By balancing the resistor values at both inverting and non-inverting inputs, the error caused by the amplifier's

input bias current will be reduced. The circuit in Figure 52 shows how to cancel the error caused by input bias

current.

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Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1

LMV321M7/NOPB Datasheet(PDF) 18 Page - Texas Instruments