LIS2DS12 datasheet(26/68 Pages) STMICROELECTRONICS

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LIS2DS12

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Programmable FIFO threshold status, FIFO overrun events and the number of unread

samples stored are available in the FIFO_SRC (2Fh) and FIFO_SAMPLES (30h) registers

and can be set to generate dedicated interrupts on the INT1 and INT2 pins using the CTRL4

(23h) and CTRL5 (24h) registers.

FIFO_SRC (2Fh) (FIFO_FTH) goes to '1' when the number of unread samples FIFO_SRC

(2Fh) and FIFO_SAMPLES (30h) (Diff[8:0]) is greater than or equal to FTH [7:0] in

FIFO_THS (2Eh).

If FTH [7:0] is equal to '0', FIFO_SRC (2Fh) (FIFO_FTH) goes to '0'.

FIFO_SRC (2Fh) (FIFO_OVRN) is equal to '1' if a FIFO slot is overwritten.

FIFO_SRC (2Fh) and FIFO_SAMPLES (30h) (Diff[8:0]) contain stored data levels of unread

samples. When Diff[8:0] is equal to '000000000', FIFO is empty. When Diff[8:0] is equal to

'100000000', FIFO is full and the unread samples are 256.

When the FIFO threshold status flag is '0'-logic, FIFO filling is lower than the threshold level

and when '1'-logic, FIFO filling is equal to or higher than the threshold level.

5.4.1

Bypass mode

In Bypass mode (FIFO_CTRL (25h) (FMODE [2:0])= 000), the FIFO is not operational, no

data is collected in FIFO memory, and it remains empty with the only actual sample

available in the output registers.

Bypass mode is also used to reset the FIFO when in FIFO mode.

For each channel only the first address is used. When new data is available, the old data is

overwritten.

5.4.2

FIFO mode

In FIFO mode (FIFO_CTRL (25h) (FMODE [2:0])= 001) data from the X, Y and Z channels

are stored in the FIFO until it is full, when 256 unread samples are stored in memory, data

collecting is stopped.

To reset the FIFO content, Bypass mode should be written in the FIFO_CTRL (25h) register,

setting the FMODE [2:0] bits to '000'. After this reset command, it is possible to restart FIFO

mode, writing the value '001' in FIFO_CTRL (25h) (FMODE [2:0]).

The FIFO buffer can memorize 256 slots of X, Y and Z data.

5.4.3

Continuous mode

Continuous mode (FIFO_CTRL (25h) (FMODE[2:0] = 110) provides a continuous FIFO

update: when 256 unread samples are stored in memory, as new data arrives the oldest

data is discarded and overwritten by the newer.

A FIFO threshold flag FIFO_CTRL (25h) (FIFO_FTH) is asserted when the number of

unread samples in FIFO is greater than or equal to FIFO_THS (2Eh) (FTH[7:0]).

It is possible to route FIFO_CTRL (25h)(FTH) to the INT1 pin by writing the INT1_FTH bit to

'1' in register CTRL4 (23h) or to the INT2 pin by writing the INT2_FTH bit to '1' in register

CTRL5 (24h).

If an overrun occurs, the oldest sample in FIFO is overwritten and the FIFO_OVR flag in

FIFO_SRC (2Fh) is asserted.

LIS2DS12 Datasheet(PDF) 26 Page - STMicroelectronics

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