Connection Diagrams

Functional Description

The ’ACT534 consists of eight edge-triggered flip-flops with

individual D-type inputs and TRI-STATE complementary out-

puts. The buffered clock and buffered Output Enable are

common to all flip-flops. The eight flip-flops will store the

state of their individual D inputs that meet the setup and hold

times requirements on the LOW-to-HIGH Clock (CP) transi-

tion. With the Output Enable (OE) LOW, the contents of the

eight flip-flops are available at the outputs. When the OE is

HIGH, the outputs go to the high impedance state. Operation

of the OE input does not affect the state of the flip-flops.

Logic Diagram

Function Table

Inputs

Output

CP

OE

D

O

N

LH

L

N

LL

H

LL

X

O

0

XH

X

Z

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

Pin Assignment

for DIP and Flatpak

DS100292-3

Pin Assignment

for LCC

DS100292-4

DS100292-5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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