M95020-DWDW4TP datasheet(14/41 Pages) STMICROELECTRONICS

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Instructions

M95020-A125 M95020-A145

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DocID025284 Rev 5

Instructions

Each command is composed of bytes (MSBit transmitted first), initiated with the instruction

byte, as summarized in Table 5.

If an invalid instruction is sent (one not contained in Table 5), the device automatically enters

a Wait state until deselected.

For read and write commands to memory array and Identification Page, the address is

defined by one byte as explained in Table 6.

Table 5. Instruction set

Instruction

Description

Instruction

format

WREN

Write Enable

0000 X110(1)

1. X = Don’t Care.

WRDI

Write Disable

0000 X100(1)

RDSR

Read Status Register

0000 X101(1)

WRSR

Write Status Register

0000 X001(1)

READ

Read from Memory Array

0000 X011

WRITE

Write to Memory Array

0000 X010

RDID

Read Identification Page

1000 0011

WRID

Write Identification Page

1000 0010

RDLS

Reads the Identification Page lock status.

1000 0011

LID

Locks the Identification page in read-only mode.

1000 0010

Table 6. Significant bits within the address bytes(1)

1. A: Significant address bit.

Instructions

Bit b3 of the

instruction

byte

Address byte

READ or WRITE

RDID or WRID

RDLS or LID

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