ST2100 datasheet(8/39 Pages) STMICROELECTRONICS

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Main features

ST2100

8/39

DocID025777 Rev 1

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Enhanced I2S for 4-channel “Digital Audio Interface“ (DAI)

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Master/slave SSP (Motorola SPI, Texas Instruments, National Semiconductor

protocols) up to 5 Mbits/s in slave mode and up to 20 Mbits/s in master mode

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I2C master/slave mode

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Two independent UARTs supporting hardware (HW) flow control

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Fast IrDA (SIR/MIR/FIR)

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Three pairs of 16-bit general purpose timers with programmable 8-bit prescaler

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Real-time clock (RTC)

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Configurable serial port (SPORT) interface for external DSP and audio codec (ADC

and DAC in I2S mode)

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Transport stream interface (Video TS also called “Synchronous peripheral bus”) for

external MPEG- 2/H.264 encoder and decoder. TS port also implements image sensor

interface (CCD camera)

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Watchdog timer

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Clock synthesizer (4 outputs)

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Vectored interrupt controller (VIC)

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JTAG (IEEE1149.1) interface

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ETM9 interface

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Multichannel cryptographic coprocessor. DES/TDES and AES security for the

powerline link

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PGC (IR) interface

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Supply voltages: 1.2 V core, 1.8 V / 2.5 V DDR, 2.5 V AFE and PLLs, 1.5 V RTC and

3.3 V I/Os

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Available in a TFBGA373 package (12 x 12 x 1.2 mm, pitch 0.5 mm).

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