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SN74LVC14APWLE Datasheet(PDF) 13 Page - Texas Instruments |
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SN74LVC14APWLE Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 35 page  V BUT t V BUT t SN54LVC14A, SN74LVC14A www.ti.com SCAS285AA – MARCH 1993 – REVISED JUNE 2015 Typical Application (continued) 10.2.2 Detailed Design Procedure 1. Recommended input conditions: – For rise time and fall time specifications, see Δt/Δv in the table. – For specified high and low levels, see VIH and VIL in the table. – Inputs and outputs are overvoltage tolerant and can therefore go as high as 3.6 V at any valid VCC. 2. Recommended output conditions: – Load currents should not exceed ±50 mA. 3. Frequency selection criterion: – Added trace resistance and capacitance can reduce maximum frequency capability; follow the layout practices listed in the section. 10.2.3 Application Curves Figure 5. Input Response Without Debounce Circuit Figure 6. Input Response With Debounce Circuit Copyright © 1993–2015, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: SN54LVC14A SN74LVC14A |
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