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D003

SN74LVC07A

www.ti.com

SCAS595V – OCTOBER 1997 – REVISED MAY 2015

Typical Application (continued)

10.2.3 Application Curves

11 Power Supply Recommendations

The power supply can be any voltage between the MIN and MAX supply voltage rating located in the

Recommended Operating Conditions table.

0.1

pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1

μf and a 1 μf

are commonly used in parallel. The bypass capacitor must be installed as close to the power pin as possible for

best results.

12 Layout

12.1 Layout Guidelines

When using multiple bit logic devices inputs must never float.

In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two

inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins must not be

left unconnected because the undefined voltages at the outside connections result in undefined operational

states. Figure 9 specifies the rules that must be observed under all circumstances. All unused inputs of digital

logic devices must be connected to a high or low bias to prevent them from floating. The logic level that must be

applied to any particular unused input depends on the function of the device. Generally they will be tied to GND

part is a transceiver.

12.2 Layout Example

Figure 9. Layout Diagram

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