1

2

7

1A

1B

1Y

5

6

3

2A

2B

2Y

SN74LVC2G08

www.ti.com

SCES198N – APRIL 1999 – REVISED DECEMBER 2015

8 Detailed Description

8.1 Overview

The SN74LVC1G06 device contains two positive-AND gates with a maximum sink current of 24 mA. A very low

tpd of 4.7ns at 3.3V makes the device ideal for high speed applications. Additionally, 5.5V tolerant inputs allow

the device to be used as a down translator if needed.

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Down Voltage Translation

will still recognize 5.5 V as a valid high input, however, the resulting output will be 3.3 V. This is the same for

equal to 5.5 V.

8.4 Device Functional Modes

Table 1 lists the functional modes of the SN74LVC2G08.

Table 1. Function Table

INPUTS

OUTPUT

A

B

Y

H

H

H

L

X

L

X

L

L

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