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UT699E Datasheet(PDF) 25 Page - Aeroflex Circuit Technology

Part # UT699E
Description  UT699E 32-bit Fault-Tolerant SPARCTM V8/LEON 3FT Processor
PDF  41 Pages
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Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

UT699E Datasheet(HTML) 25 Page - Aeroflex Circuit Technology

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Aeroflex Microelectronics Solutions - HiRel
36-00-00-001
Ver. 1.5.0
4.1.4 Boot Strap Programming on GPIO
Data on pins GPIO[2:0], GAPIO[7:4] and GPIO[15:12] are latched on the rising edge of reset. The states of GPIO[2:0] determine
the data width of the PROM area, and enable EDAC for the PROM area. Chapter 3 of the User’s Manual describes the value of
these inputs to achieve the required operation. The states of GPIO[7:4] provides a means to configure the SpaceWire clock divisor
link bits in the Clock Divisor Register. The states of GPIO[15:12] set the least significant address nibble of the IP and MAC address
for the Ethernet Debug Communication Link (EDCL).
In order for the state of GPIO[2:0] to be properly latched, Aeroflex recommends placing pull-up or pull-down resistors on these pins
to ensure that the setup and hold timing is met. The states of these pins should be statically set prior to the rising edge of RESET.



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