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UT54ACTS273 Datasheet(PDF) 1 Page - Aeroflex Circuit Technology |
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UT54ACTS273 Datasheet(HTML) 1 Page - Aeroflex Circuit Technology |
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1 / 10 page  1 Standard Products UT54ACS273/UT54ACTS273 Octal D-Flip-Flops with Clear Datasheet December 16, 2011 www.aeroflex.com/logic FEATURES Contains eight flip-flops with single-rail outputs Buffered clock and direct clear inputs Individual data input to each flip-flop Applications include: - Buffer/storage registers, shift registers, and pattern generators CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 20-pin DIP - 20-lead flatpack UT54ACS273 - SMD 5962-96578 UT54ACTS273 - SMD 5962-96579 DESCRIPTION The UT54ACS273 and the UT54ACTS273 are positive-edge- triggered D-type flip-flops with a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The devices are characterized over full military temperature range of -55 C to +125C. FUNCTION TABLE PINOUTS 20-Pin DIP Top View 20-Lead Flatpack Top View LOGIC SYMBOL INPUTS OUTPUTS CLR CLK Dx Qx L X X L H H H L H L X H L No change 1 2 3 4 5 7 6 20 19 18 17 16 14 15 CLR 1Q 1D 2D 2Q 3Q 3D VDD 8Q 8D 7D 7Q 6D 8 13 4D 5D 6Q 9 12 4Q 5Q 10 11 VSS CLK 1 2 3 4 5 7 6 20 19 18 17 16 14 15 CLR 1Q 1D 2D 2Q 3Q 3D VDD 8Q 8D 7D 7Q 6D 8 13 4D 5D 6Q 9 12 4Q 5Q 10 11 VSS CLK (1) CLR (11) CLK C1 R (3) 1D (4) 2D (2) 1Q (6) 3Q (9) 4Q (12) 5Q (15) 6Q (16) 7Q (19) 8Q 1D (7) 3D (8) 4D (13) 5D (14) 6D (17) 7D (18) 8D (5) 2Q Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12. |
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