ATMEGA323 datasheet(22/247 Pages) ATMEL

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ATmega323(L)

1457G–AVR–09/03

The Stack Pointer – SP

The ATmega323 Stack Pointer is implemented as two 8-bit registers in the I/O space

locations $3E ($5E) and $3D ($5D). As the ATmega323 Data memory has $860 loca-

tions, 12 bits are used.

The Stack Pointer points to the data SRAM Stack area where the Subroutine and Inter-

rupt Stacks are located. This Stack space in the data SRAM must be defined by the

program before any subroutine calls are executed or interrupts are enabled. The Stack

Pointer must be set to point above $60. The Stack Pointer is decremented by one when

data is pushed onto the Stack with the PUSH instruction, and it is decremented by two

when the return address is pushed onto the Stack with subroutine call and interrupt. The

Stack Pointer is incremented by one when data is popped from the Stack with the POP

instruction, and it is incremented by two when data is popped from the Stack with return

from subroutine RET or return from interrupt RETI.

Reset and Interrupt

Handling

The ATmega323 provides nineteen different interrupt sources. These interrupts and the

separate Reset Vector, each have a separate Program Vector in the Program memory

space. All interrupts are assigned individual enable bits which must be set (one)

together with the I-bit in the Status Register in order to enable the interrupt. Depending

on the Program Counter value, interrupts may be disabled when Boot Lock bits BLB02

or BLB12 are set. See the section “Boot Loader Support” on page 177 for details

The lowest addresses in the Program memory space are automatically defined as the

Reset and Interrupt Vectors. The complete list of vectors is shown in Table 3. The list

also determines the priority levels of the different interrupts. The lower the address the

higher is the priority level. RESET has the highest priority, and next is INT0 – the Exter-

nal Interrupt Request 0, etc. The Interrupt Vectors can be moved to the start of the boot

Flash section by setting the IVSEL bit in the General Interrupt Control Register (GICR).

See the GICR description on page 33 for details..

Bit

151413121110

$3E ($5E)

––––

SP11

SP10

SP9

SP8

SPH

$3D ($5D)

SP7

SP6

SP5

SP4

SP3

SP2

SP1

SP0

SPL

76543210

Read/Write

RRRR

R/W

Initial Value

00000000

Table 3. Reset and Interrupt Vectors

Vector No.

Program Address(2)

Source

Interrupt Definition

$000(1)

RESET

External Pin, Power-on Reset,

Brown-out Reset and Watchdog

Reset

$002

INT0

External Interrupt Request 0

$004

INT1

External Interrupt Request 1

$006

INT2

External Interrupt Request 2

$008

TIMER2 COMP

Timer/Counter2 Compare Match

$00A

TIMER2 OVF

Timer/Counter2 Overflow

$00C

TIMER1 CAPT

Timer/Counter1 Capture Event

$00E

TIMER1 COMPA

Timer/Counter1 Compare Match A

$010

TIMER1 COMPB

Timer/Counter1 Compare Match B

ATMEGA323 Datasheet(PDF) 22 Page - ATMEL Corporation

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