9

Shown in Figure 7 is an application to monitor and detect power supply over voltage through the use of the PFI pin. When the

voltage at the PFI input, (VTH) exceeds VREF, (0.6V) the PFO output transitions from low to high causing the MR output to

transition from high to low. This asserts a RESET indicating the voltage being monitored has exceeded the over voltage monitor

limit.

Figure 7. UT01VS33L Over Voltage Power Supply Monitoring and Reset

VDD

I/O

RESETB

uP

MR

1

2 VDD

PFI

3

7

6

8

WDI

WDO

RESET

R1

R2

GND

4

PFO 5

UT01VS33L

VTH_OV= (R1+R2)/R2 ) * VPFI

VPFI=0.6V +/‐ 25mV

VDD 3.3V

3.3V INV 

GATE

IN1