8

Shown in Figure 5 is an application for monitoring the under voltage of a power supply connected to a microprocessor or ASIC. If

the analog voltage monitored falls below the desired threshold value, the PFO output connected to the MR input will transition low

causing the RESET_OD output to be asserted low indicating an under voltage condition.

Shown in Figure 6 are two Voltage Supervisors configured to monitor both the 3.3V and 2.5V power supplies of a system. The

3.3V regulated supply is monitored by the PFI pin of the top Voltage Supervisor, while the 2.5 V regulated supply is monitored by

the PFI pin of the bottom Voltage Supervisor. The cross coupled connection of PFO to MR assures that RESET_OD will be

asserted when a brown out occurs on either the 3.3V or 2.5V regulated supplies.

Figure 5. UT01VS50D Under Voltage Monitor and Detection

1

2 VDD

PFI

3

7

6

8

WDI

R1

R2

GND

4

5

VDD

I/O

uP

RPU

RPU=(VDD/IOL)

VDD 5V

VTH= (R1+R2)/R2 ) * VPFI

VPFI=1.25V +/- 50mV

VIN_ANALOG

RESET

MR

WDO

PFO

RESET_OD

Figure 6. Under Voltage Monitoring and sequencing of 3.3V and 2.5V Power Supplies

MR

1

2 VDD

PFI

3

7

6

8

WDI

WDO

RESET_OD

R1

R2

GND

4

PFO 5

VTH= (R1+R2)/R2 ) * VPFI

VPFI=1.25V +/- 50mV

3.3V_REG

VOUT

VIN

EN

VREG 3.3V

VOUT

VIN

EN

VREG 2.5V

2.5V_REG

VDD 5V

MR

1

2 VDD

PFI

3

7

6

8

WDI

WDO

RESET_OD

GND

4

PFO 5

R3

R4

UT01VS50D

WDI OPEN

3.3V REG

LED

R6

2.5V REG

LED

R7

VDD_IO

VDD

RST

VTH= (R3+R4)/R4 ) * VPFI

VPFI=1.25V +/- 50mV

UT01VS50D

R

R