9314DMQB datasheet(3/6 Pages) NSC

3 / 6 page

Switching Characteristics VCC ea50V TA ea25 C (See Section 1 for waveforms and load configurations)

Symbol

Parameter

CL e 15 pF

Units

Min

Max

tPLH

Propagation Delay

tPHL

E to Qn

tPLH

Propagation Delay

tPHL

Dn to Qn

tPLH

Propagation Delay

MR to Qn

tPHL

Propagation Delay

Sn to Qn

Functional Description

The ’9314 consists of four latches with a common active

LOW Enable input and active LOW Master Reset input

When the Enable goes HIGH data present in the latches is

stored and the state of the latch is no longer affected by the

Sn and Dn inputs The Master Reset when activated over-

rides all other input conditions forcing all latch outputs LOW

Each of the four latches can be operated in one of two

modes

D-TYPE LATCHFor D-type operation the S input of a latch

is held LOW While the common Enable is active the latch

output follows the D input Information present at the latch

output is stored in the latch when the Enable goes HIGH

SETRESET LATCHDuring setreset operation when the

common Enable is LOW a latch is reset by a LOW on the D

input and can be set by a LOW on the S input if the D input

is HIGH If both S and D inputs are LOW the D input will

dominate and the latch will be reset When the Enable goes

HIGH the latch remains in the last state prior to disable-

ment The two modes of latch operation are shown in the

Truth Table

Operation

D Mode

Qnb1

RS Mode

HHQnb1

Qnb1

Reset

H e HIGH Voltage Level

L e LOW Voltage Level

X e Immaterial

Qnb1 e Previous Output State

Qn e Present Output State

9314DMQB Datasheet(PDF) 3 Page - National Semiconductor (TI)

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