TLP7930,TLP7930F

3

5.

5.

5.

5. Pin Assignment

Pin Assignment

Pin Assignment

Pin Assignment

5.1.

5.1.

5.1.

5.1. Pin Description

Pin Description

Pin Description

Pin Description

Pin No.

1

2

3

4

5

6

7

8

Symbol

GND1

GND2

MDAT

MCLK

Description

Input side supply voltage

Positive input

Negative input

Input side ground

Output side ground

Modulator data output

Modulator clock output

Output side supply voltage

6.

6.

6.

6. Internal Circuit (Note)

Internal Circuit (Note)

Internal Circuit (Note)

Internal Circuit (Note)

Note:

A 0.1-µF bypass capacitor must be connected between 1 and 4 pins and between 5 and 8 pins.

7.

7.

7.

7. Principle of Operation

Principle of Operation

Principle of Operation

Principle of Operation

7.1.

7.1.

7.1.

7.1. Mechanical Parameters

Mechanical Parameters

Mechanical Parameters

Mechanical Parameters

Characteristics

Creepage distances

Clearance

Internal isolation thickness

7.62-mm Pitch

TLP7930

7.0 (min)

7.0 (min)

0.4 (min)

10.16-mm Pitch

TLP7930F

8.0 (min)

8.0 (min)

0.4 (min)

Unit

mm

2016-04-14

Rev.2.0

©2016 Toshiba Corporation