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DF2S6.8UCT Datasheet(PDF) 2 Page - Toshiba Semiconductor

Part # DF2S6.8UCT
Description  ESD Protection Diodes Silicon Epitaxial Planar
PDF  7 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

DF2S6.8UCT Datasheet(HTML) 2 Page - Toshiba Semiconductor

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DF2S6.8UCT
2
4.
4.
4.
4. Electrical Characteristics (Unless otherwise specified, T
Electrical Characteristics (Unless otherwise specified, T
Electrical Characteristics (Unless otherwise specified, T
Electrical Characteristics (Unless otherwise specified, Taaaa = 25
= 25
= 25
= 25
))))
VRWM: Working peak reverse
voltage
VBR: Reverse breakdown voltage
IBR: Reverse breakdown current
VR: Reverse voltage
IR: Reverse current
VF: Forward voltage
IF: Forward current
VC: Clamping voltage
IPP: Peak pulse current
RDYN: Dynamic resistance
Fig.
Fig.
Fig.
Fig. 4.1
4.1
4.1
4.1 Definitions of Electrical Characteristics
Definitions of Electrical Characteristics
Definitions of Electrical Characteristics
Definitions of Electrical Characteristics
Characteristics
Working peak reverse voltage
Reverse breakdown voltage
Reverse current
Dynamic resistance
Total capacitance
Working peak reverse voltage
Reverse breakdown voltage
Reverse current
Symbol
VRWM(1)
VBR(1)
IR(1)
RDYN
Ct
VRWM(2)
VBR(2)
IR(2)
Note
(Note 1)
Test Condition
IBR = 1 mA
VRWM = 5 V
VR = 0 V, f = 1 MHz
IBR = 1 mA
VRWM = 19 V
Min
5.3
22
Typ.
6.8
0.3
1.6
25
Max
5
0.1
19
0.5
Unit
V
V
µA
Ω
pF
V
V
µA
Note 1: TLP parameter: Z0 = 50 Ω, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns,
extraction of dynamic resistance using a least-squares fit of TLP characteristics at IPP between 3 A to 8 A.
5.
5.
5.
5. Guaranteed ESD Protection (Note)
Guaranteed ESD Protection (Note)
Guaranteed ESD Protection (Note)
Guaranteed ESD Protection (Note)
Test Condition
IEC61000-4-2 (Contact discharge)
ESD Protection
±8 kV
Note:
Criterion: No damage to devices.
2014-04-15
Rev.3.0



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