ADC0851BIN datasheet(13/36 Pages) NSC

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Pin Descriptions

VCC

Positive power supply pin Bypass to analog

ground with a 01 mF ceramic capacitor in

parallel with a 10 mF tantalum capacitor

OSC

InputOutput pin used to generate internal

timing for AD conversion This pin is con-

nected to an external resistor and capacitor

to set the oscillation frequency for analog

timing (see

Figure 12 )

This is the chip select input pin It must be

held low while data is transferred to or from

the ADC08518 (see Timing Diagram)

CLK

The serial clock input pin is used to clock

serial data either into the data input pin (DI)

or out of the data output pin (DO) Input data

is loaded on the rising edge of CLK and the

output data is valid at the falling edge of

CLK

Serial data digital input pin

TRI-STATE data output pin

INT

This is the active low interrupt pin that indi-

cates that at least one analog input channel

voltage

level

has

exceeded

the

pro-

grammed window limits Since this pin has

an open drain output an external pull up re-

sistor is required This allows many devices

to be wire-ORed together using a single

pull-up resistor

EOC

End of conversion output pin The low state

indicates that an AD conversion is in prog-

ress The EOC pin goes high when the con-

version is completed

AGND

Analog ground reference

DGND

Digital ground reference for the logic inputs

Both AGND and DGND should be at same

potential

VREF

This is the analog reference pin The volt-

age applied to this pin sets the full scale

AD conversion range Recommended volt-

ages applied to this pin range from 1V to

VCC Bypass to analog ground with a 01 mF

ceramic capacitor in parallel with a 10mF

tantalum capacitor

COM

The COM pin functions as an inverting dif-

ferential input common to all analog inputs

when each channel is configured as a sin-

gle-ended channel If the input channels are

programmed as differential pairs then the

COM input has no effect

CH0 – CH1

CH0 – CH7 are analog input channels which

(ADC0851)

can be configured as single ended inputs or

as differential pairs The analog input volt-

CH0 – CH7

age should stay within the power supply

(ADC0858)

range

COMPL

These output pins are available only on the

COMPH

ADC0851 During ‘‘Watchdog’’ operation if

either of the inputs exceeds the window lim-

its not only is an interrupt generated but

also the COMPL and COMPH pins go low to

indicate whether the upper or lower bounda-

ry was exceeded (See applications section

for more information)

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