ADC12138CIWM datasheet(33/41 Pages) NSC

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Application Hints (Continued)

The ADC12130/2/8 can be used in either ratiometric or abso-

lute reference applications. In ratiometric systems, the ana-

log input voltage is proportional to the voltage used for the

ADC’s reference voltage. When this voltage is the system

power supply, the V

REF

+ pin is connected to V

+ and V

REF

−

is connected to ground. This technique relaxes the system

reference stability requirements because the analog input

voltage and the ADC reference voltage move together. This

maintains the same output code for given input conditions.

For absolute accuracy, where the analog input voltage varies

between very specific voltage limits, a time and temperature

stable voltage source can be connected to the reference in-

puts. Typically, the reference voltage’s magnitude will require

an initial adjustment to null reference voltage induced

full-scale errors.

Below are recommended references along with some key

specifications.

Output

Temperature

Part Number

Voltage

Coefficient

Tolerance

LM4041CI-Adj

±0.5%

±100ppm/˚C

LM4040AI-4.1

±0.1%

±100ppm/˚C

Circuit of

Figure 16

Adjustable

±2ppm/˚C

The reference voltage inputs are not fully differential. The

ADC12130/2/8 will not generate correct conversions or com-

parisons if V

REF

+ is taken below V

REF

−. Correct conversions

result when V

REF

+ and V

REF

− differ by 1V and remain, at all

times, between ground and V

+. The V

REF common mode

range, (V

REF

+ +V

REF

−)/2 is restricted to (0.1 x V

+) to (0.6 x

+). Therefore, with V

+ = 5V the center of the reference

ladder should not go below 0.5V or above 3.0V.

Figure 17 is

a graphic representation of the voltage restrictions on V

REF

and V

REF

−.

4.0 ANALOG INPUT VOLTAGE RANGE

The ADC12130/2/8’s fully differential ADC generate a two’s

complement output that is found by using the equation

shown below:

for (12-bit) resolution the Output Code =

Round off to the nearest integer value between −4096 to

4095 if the result of the above equation is not a whole num-

ber.

Examples are shown in the table below:

Digital

VREF

−

VIN

−

Output

Code

+2.5V

+1V

+1.5V

0,1111,1111,1111

+4.096V

+3V

0,1011,1011,1000

+4.096V

+2.499V

+2.500V

1,1111,1111,1111

+4.096V

1,0000,0000,0000

5.0 INPUT CURRENT

At the start of the acquisition window (t

A) a charging current

flows into or out of the analog input pins (A/DIN1 and

A/DIN2) depending on the input voltage polarity. The analog

input pins are CH0–CH7 and COM when A/DIN1 is tied to

MUXOUT1 and A/DIN2 is tied to MUXOUT2. The peak value

of this input current will depend on the actual input voltage

applied, the source impedance and the internal multiplexer

switch on resistance. With MUXOUT1 tied to A/DIN1 and

MUXOUT2 tied to A/DIN2 the internal multiplexer switch on

resistance is typically 1.6 k

Ω. The A/DIN1 and A/DIN2 mux

on resistance is typically 750

Ω.

6.0 INPUT SOURCE RESISTANCE

For low impedance voltage sources (<600

Ω), the input

charging current will decay, before the end of the S/H’s ac-

quisition time of 2 µs (10 CCLK periods with f

CK = 5 MHz), to

a value that will not introduce any conversion errors. For high

source impedances, the S/H’s acquisition time can be in-

DS012079-43

*Tantalum

FIGURE 16. Low Drift Extremely

Stable Reference Circuit

DS012079-44

FIGURE 17. V

REF Operating Range

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