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PIC16F877ATI/ML Datasheet(PDF) 177 Page - Microchip Technology

Part # PIC16F877ATI/ML
Description  28/40-pin Enhanced FLASH Microcontrollers
PDF  234 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F877ATI/ML Datasheet(HTML) 177 Page - Microchip Technology

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 2003 Microchip Technology Inc.
DS39582B-page 175
PIC16F87XA
17.1
DC Characteristics:
PIC16F873A/874A/876A/877A (Industrial, Extended)
PIC16LF873A/874A/876A/877A (Industrial)
PIC16LF873A/874A/ 876A/877A
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
≤ TA ≤ +85°C for industrial
PIC16F873A/874A/876A/877A
(Industrial, Extended)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
≤ TA ≤ +85°C for industrial
-40°C
≤ TA ≤ +125°C for extended
Param
No.
Symbol
Characteristic/
Device
Min
Typ†
Max
Units
Conditions
VDD
Supply Voltage
D001
16LF87XA
2.0
—
5.5
V
All configurations
(DC to 10 MHz)
D001
16F87XA
4.0
—
5.5
V
All configurations
D001A
VBOR
5.5
V
BOR enabled, FMAX = 14 MHz(7)
D002
VDR
RAM Data Retention
Voltage(1)
—1.5
—
V
D003
VPOR
VDD Start Voltage to
ensure internal Power-on
Reset signal
—VSS
—V
See Section 14.5 “Power-on
Reset (POR)” for details
D004
SVDD
VDD Rise Rate to ensure
internal Power-on Reset
signal
0.05
—
—
V/ms
See Section 14.5 “Power-on
Reset (POR)” for details
D005
VBOR
Brown-out Reset
Voltage
3.65
4.0
4.35
V
BODEN bit in configuration word
enabled
Legend: Rows with standard voltage device data only are shaded for improved readability.
† Data in “Typ” column is at 5V, 25°C, unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1:
This is the limit to which VDD can be lowered without losing RAM data.
2:
The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O
pin loading, switching rate, oscillator type, internal code execution pattern and temperature, also have an
impact on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD;
MCLR = VDD; WDT enabled/disabled as specified.
3:
The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is
measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD and VSS.
4:
For RC osc configuration, current through REXT is not included. The current through the resistor can be
estimated by the formula Ir = VDD/2REXT (mA) with REXT in k
Ω.
5:
Timer1 oscillator (when enabled) adds approximately 20
µA to the specification. This value is from
characterization and is for design guidance only. This is not tested.
6:
The
∆ current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
7:
When BOR is enabled, the device will operate correctly until the VBOR voltage trip point is reached.



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