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SN74LVC2G74 Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVC2G74 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 15 page ![]() www.ti.com FEATURES DCT OR DCU PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5 CLK D Q GND VCC PRE CLR Q 4 3 2 1 5 6 7 8 GND Q D CLK Q CLR PRE VCC YEA, YEP, YZA, OR YZP PACKAGE (BOTTOM VIEW) DESCRIPTION/ORDERING INFORMATION SN74LVC2G74 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCES203K – APRIL 1999 – REVISED JUNE 2005 • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 5.9 ns at 3.3 V • Low Power Consumption, 10- µA Max I CC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoStar™ SN74LVC2G74YEAR WCSP (DSBGA) – YEA NanoFree™ SN74LVC2G74YZAR WCSP (DSBGA) – YZA (Pb-free) Reel of 3000 _ _ _CP_ NanoStar™ – WCSP (DSBGA) SN74LVC2G74YEPR 0.23-mm Large Bump – YEP –40°C to 85°C NanoFree™ – WCSP (DSBGA) SN74LVC2G74YZPR 0.23-mm Large Bump – YZP (Pb-free) SSOP – DCT Reel of 3000 SN74LVC2G74DCTR C74_ _ _ Reel of 3000 SN74LVC2G74DCUR VSSOP – DCU C74_ Reel of 250 SN74LVC2G74DCUT (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1999–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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