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CD74FCT2952AM Datasheet(PDF) 1 Page - Texas Instruments |
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CD74FCT2952AM Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 9 page ![]() CD74FCT2952A BiCMOS OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCBS720 – JULY 2000 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D BiCMOS Technology With Low Quiescent Power D Buffered Inputs D Noninverted Outputs D Input/Output Isolation From VCC D Controlled Output Edge Rates D 64-mA Output Sink Current D Output Voltage Swing Limited to 3.7 V at VCC = 5 V D SCR Latch-Up-Resistant BiCMOS Process and Circuit Design D Packaged in Plastic Small-Outline Package description The CD74FCT2952A is an octal transceiver and register, consisting of two 8-bit, back-to-back registers that store data flowing in both directions between two bidirectional buses. It uses a small-geometry BiCMOS technology. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input if the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port. This device contains two 8-bit, back-to-back registers that store data flowing in both directions between two bidirectional buses. Each register has separate clock, clock enable, and 3-state output enable signals associated with it. The output stage is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 mA. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The CD74FCT2952A is characterized for operation from 0 °C to 70°C. FUNCTION TABLE† INPUTS OUTPUT CLKENAB CLKAB OEAB A B H X L X B0‡ X H or L L X B0‡ L ↑ LL L L ↑ LH H X X H X Z † A-to-B data flow is shown; B-to-A data flow is similar, but uses CLKENBA, CLKBA, and OEBA. ‡ Level of B before the indicated steady-state input conditions were established Copyright © 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 B8 B7 B6 B5 B4 B3 B2 B1 OEAB CLKAB CLKENAB GND VCC A8 A7 A6 A5 A4 A3 A2 A1 OEBA CLKBA CLKENBA M PACKAGE (TOP VIEW) |
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