Preliminary Technical Data

AD9289

Rev. PrJ | Page 3 of 16

6/25/2004

AD9289—SPECIFICATIONS

1

AVDD = 3.0V, DRVDD = 3.0V; INT REF; DIFFERENTIAL ANALOG AND CLOCK INPUTS

Parameter

Temp

Test Level

Min

Typ

Max

Unit

RESOLUTION

8

Bits

No Missing Codes

Full

VI

Guaranteed

Offset Matching

25

°C

I

± 25

mV

Gain Matching

2

25

°C

I

± 2

% FS

Differential Nonlinearity (DNL)

25

°C

I

± 0.25

LSB

Full

VI

LSB

Integral Nonlinearity (INL)

25

°C

I

± 0.5

LSB

ACCURACY

Full

VI

LSB

Offset Error

Full

V

± 16

ppm/

°C

Gain Error

2

Full

V

± 150

ppm/

°C

TEMPERATURE

DRIFT

Reference

Full

V

ppm/

°C

Internal Reference Voltage

25

°C

I

0.5

V

Output Current

Full

V

uA

Input Current

Full

V

uA

REFERENCE

Input Resistance

Full

V

7

k

Ω

Differential Input Voltage Range

1 –2

Vpp

Common Mode Voltage

Full

V

1.5

V

Input Resistance

Full

V

tbd

k

Ω

Input Capacitance

Full

V

5

pF

ANALOG INPUTS

Analog Bandwidth, Full Power

Full

V

400

MHz

AVDD

Full

IV

2.85

3.0

3.15

V

DRVDD

Full

IV

2.85

3.0

3.15

V

Power Dissipation

3

Full

VI

558

mW

Power Down Dissipation

Full

VI

<10

mW

Power Supply Rejection Ratio

(PSRR)

25

°C

I

mV/V

IAVDD

3

Full

VI

150

mA

POWER SUPPLY

DRVDD

3

Full

VI

36

mA

CROSSTALK

Crosstalk

Full

V

70

dB

Table 1

0.5dBFS.