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WM8993 Datasheet(PDF) 69 Page - Wolfson Microelectronics plc |
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WM8993 Datasheet(HTML) 69 Page - Wolfson Microelectronics plc |
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69 / 229 page ![]() Production Data WM8993 w PD, November 2010, Rev 4.0 69 SEQUENCE HEADPHONE ENABLE Step 1 HPOUT1L_ENA = 1 HPOUT1R_ENA = 1 Step 2 20 μs delay Step 3 HPOUT1L_DLY = 1 HPOUT1R_DLY = 1 Step 4 DC offset correction Step 5 HPOUT1L_OUTP = 1 HPOUT1L_RMV_SHORT = 1 HPOUT1R_OUTP = 1 HPOUT1R_RMV_SHORT = 1 Table 39 Headphone Output Enable Sequence SEQUENCE HEADPHONE DISABLE Step 1 HPOUT1L_RMV_SHORT = 0 HPOUT1L_DLY = 0 HPOUT1L_OUTP = 0 HPOUT1R_RMV_SHORT = 0 HPOUT1R_DLY = 0 HPOUT1R_OUTP = 0 Step 2 HPOUT1L_ENA = 0 HPOUT1R_ENA = 0 Table 40 Headphone Output Disable Sequence The sequences described above in Table 39 and Table 40 are implemented automatically by the WM8993 when the HPOUT1_AUTO_PU bit is set, which is the default condition. In this mode, the enable sequence is triggered by setting the HPOUT1L_ENA and HPOUT1R_ENA bits in register R1. Note that the Charge Pump is also enabled automatically in this mode. The register bits relating to pop suppression control are defined in Table 41. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1 (01h) Power Management (1) 9 HPOUT1L_ENA 0b Enables HPOUT1L input stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set as the first step of the HPOUT1L Enable sequence. Note: When HPOUT1_AUTO_PU is set, the HPOUT1L_ENA bit automatically enables all stages of the left headphone driver 8 HPOUT1R_ENA 0b Enables HPOUT1R input stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set as the first step of the HPOUT1R Enable sequence. Note: When HPOUT1_AUTO_PU is set, the HPOUT1R_ENA bit automatically enables all stages of the right headphone driver |
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