TRF6901 datasheet(13/29 Pages) TI

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TRF6901

SINGLECHIP RF TRANSCEIVER

SLWS110G − SEPTEMBER 2001 − REVISED JUNE 2004

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

detailed description (continued)

PLL

The phase-locked loop is the radio frequency synthesizer for the TRF6901. It is used to generate the transmit

signal and as the local oscillator for the receive mixer. The signal (FX) from a reference crystal oscillator (XO)

is divided by an integer factor R down to FR. The minimum frequency resolution, and thus, the minimum channel

spacing, is FR.

FR = FX ÷ R, where 1 ≤ R ≤ 256

The phase-locked loop is an integer-N design. The voltage-controlled oscillator (VCO) signal is divided by an

integer factor N to get a frequency at the phase detector input.

FPD = FVCO ÷ N, where FVCO = FOUT

The phase detector compares the divided VCO signal to the divided crystal frequency and implements an error

signal from two charge pumps. The error signal corrects the VCO output to the desired frequency.

With FR = FPD under locked conditions, FOUT =

= (A + 32B) FR.

As is in any integer-N PLLs, the VCO output has spurs at integer multiples of the reference frequency (nFR).

In applications requiring contiguous frequency channels, the reference frequency is often chosen to be equal

to the channel spacing, thus, channel spacing = FR = FX ÷ R.

oscillator circuit and reference divider

The reference divider reduces the frequency of the external crystal (FX) by an 8-bit programmable integer divisor

to an internal reference frequency (FR) used for the phase-locked loop. The choice of internal reference

frequency also has implications for lock time, maximum data rate, noise floor, and loop-filter design. The crystal

frequency can be tuned using the D word to control internal trimming capacitors, which are placed in parallel

with the crystal. These offset a small frequency error in the crystal. In an FSK application, an additional capacitor

is placed in parallel (through terminal 31) with the external capacitor that is connected in series with the crystal,

thus, changing the load capacitance as the transmit data switch (TX_DATA, terminal 32) is toggled. The change

in load capacitance pulls the crystal off-frequency by the total frequency deviation.

Hence, the 2-FSK frequency set by the level of TX_DATA and the external capacitor, can be represented as

follows:

out1 + TX_DATA Low

out2 + TX_DATA High

Note that the frequencies

ƒout1 and ƒout2 are centered about the frequency ƒcenter = (ƒout1 + ƒout2)/2. When

transmitting FSK,

ƒcenter is considered to be the effective carrier frequency and any receiver local oscillator (LO)

should be set to the same

ƒcenter frequency ± the receiver’s IF frequency (ƒIF) for proper reception and

demodulation.

For the case of high-side injection, the receiver LO would be set to

ƒLO = ƒcenter + ƒIF. Using high-side injection,

the received data at terminal 33, RX_DATA, would be inverted from the transmitted data applied at terminal 32,

TX_DATA. Conversely, for low-side injection, the receiver LO would be set to

ƒLO = ƒcenter − ƒIF. Using low-side

injection, the received data would be the same as the transmitted data.

In addition, when the TRF6901 is placed in receive mode, it is recommended that the TX_DATA terminal be kept

low. In this manner, the actual LO frequency injected into the mixer is

ƒout1 = ƒLO. If TX_DATA is set high, the

the receiver LO would be offset, resulting in poor receiver sensitivity.

TRF6901 Datasheet(PDF) 13 Page - Texas Instruments

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