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LM9061MX/NOPB Datasheet(PDF) 3 Page - Texas Instruments |
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LM9061MX/NOPB Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 33 page ![]() LM9061, LM9061-Q1 www.ti.com SNOS738H – APRIL 1995 – REVISED JANAURY 2015 5 Pin Configuration and Functions SOIC See Package Number D0008A Top View Pin Functions PIN I/O DESCRIPTION NAME NO. The inverting input to the protection comparator, connected to the external MOSFET source pin and Sense 1 I the load. The noninverting input to the protection comparator, and a current sink for the threshold resistor to Threshold 2 I set the allowed voltage drop across the external MOSFET. Ground 3 — Ground Output 4 O The gate drive connection. Charges, and discharges, the MOSFET gate. The voltage supply pin. The VCC operating range has a minimum value of 7 V, and a maximum value VCC 5 I of 26 V. A resistor on this pin to ground sets the current through the threshold resistor, which sets the allowed IREF 6 O voltage drop across the external MOSFET. The control pin. A low voltage, VIN(0), will disable device operation, while a high voltage, VIN(1), will On/Off 7 I enable device operation. A capacitor on this pin to ground will provide a delay time between when the protection comparator Delay 8 O detects excessive VGS across the MOSFET and when the gate drive circuitry is latched-OFF. Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM9061 LM9061-Q1 |
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