TAS5100

SLLS419B − MARCH 2001 − REVISED NOVEMBER 2001

12

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static digital specifications

PARAMETERS

MIN

MAX

UNIT

High-level input voltage, VIH

2

V

Low-level input voltage, VIL

0.8

V

Input leakage current

−10

10

µA

PARAMETERS

MIN

MAX

UNIT

Internal pullup resistors from SHUTDOWN, ERR0, ERR1 to DVDD

15

k

Ω

Low-level output voltage (IO = 4 mA), VOL

0.4

V

TAS5000/TAS5100 system performance measured at the speaker terminals

See the TI Literature Number SLAA117 for TAS5000/TAS5100 system performance.

electrical characteristics

PVDDA1 = 25 V, PVDDB1 = 25 V, PVDDA2 = 22 V, PVDDB2 = 22 V, 50% input duty cycle)

PARAMETER

TYP

MAX

UNIT

DVDD

Operating

2

mA

DVDD

PWDN = 0

500

µA

Supply current

PVDDA1

Operating†

6.3

mA

Supply current

PVDDA1

PVDDB1

PWDN = 0

25

µA

PVDDA2

Operating

6.5

mA

PVDDA2

PVDDB2

PWDN = 0

250

µA

† 13-kΩ resistor from BIAS_A (pin 11) to DVSS and 13-kΩ resistor from BIAS_B (pin 12) to DVSS.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Drain-to-source breakdown voltage

ID = 1 mA,

PWDN = 0,

Hi-Z state

28

V

Forward on-state resistance, low side drivers

OUTPUTA and OUTPUTB to PVSS

ISINK = 2.5 A,

See Notes 2, 3, and 4,

PWM_AP = PWM_BP = 0,

PWM_AM = PWM_BM = 1

0.2

Ω

Forward on-state resistance, high side drivers

PVDDA1 to OUTPUTA, PVDDB1 to OUTPUTB

ISOURCE = 2.5 A,

See Notes 2, 3, and 5,

PWM_AP = PWM_BP = 1,

PWM_AM = PWM_BM = 0

0.2

Ω

On-state resistance matching low-side drivers

98%

On-state resistance matching high-side drivers

98%

NOTES:

1. Test time should be < 1 ms to avoid temperature change.

2. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.

3. Connect PVDDA2 and PVDDB2 to 22-V power supply with respect to PVSS. LDROUTA, LDROUTB, BOOTSTRAPA, and

BOOTSTRAPB pins open.

4. Connect PVDDA2 to 22-V power supply with respect to PVSS. LDROUTA, LDROUTB, BOOTSTRAPA and BOOTSTRAPB

capacitors are connected respectively. Clock PWM inputs to allow bootstrap capacitors to charge. 93−99% modulation must be used

on PWM_AP, PWM_AM, PWM_BP, and PWM_BM inputs to prevent the activity detector from shutting down the device during this

measurement. Note that Fswitching = 384 kHz.