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23K256-I/P Datasheet(PDF) 11 Page - Microchip Technology |
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23K256-I/P Datasheet(HTML) 11 Page - Microchip Technology |
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11 / 28 page ![]() 2008-2011 Microchip Technology Inc. DS22100F-page 11 23A256/23K256 2.5 Read Status Register Instruction (RDSR) The Read Status Register instruction (RDSR) provides access to the STATUS register. The STATUS register may be read at any time. The STATUS register is formatted as follows: TABLE 2-2: STATUS REGISTER The mode bits indicate the operating mode of the SRAM. The possible modes of operation are: 0 0 = Byte mode (default operation) 1 0 = Page mode 0 1 = Sequential mode 1 1 = Reserved Write and read commands are shown in Figure 2-7 and Figure 2-8. The HOLD bit enables the Hold pin functionality. It must be set to a ‘0’ before HOLD pin is brought low for HOLD function to work properly. Setting HOLD to ‘1’ disables feature. Bits 1 through 5 are reserved and should always be set to ‘0’. See Figure 2-7 for the RDSR timing sequence. FIGURE 2-7: READ STATUS REGISTER TIMING SEQUENCE (RDSR) 76 5 4 3 2 1 0 W/R W/R – – – – – W/R MODE MODE 00 0 0 0 HOLD W/R = writable/readable. SO SI CS 9 1011 12131415 11 0 0 0 0 00 76 5 4 2 1 0 Instruction Data from STATUS Register High-Impedance SCK 0 2 34 56 7 18 3 |
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