OPA561 datasheet(11/17 Pages) TI1

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OPA561

SBOS206E − DECEMBER 2001 − REVISED FEBRUARY 2007

www.ti.com

The top-side solder mask should leave exposed the

terminals of the package and the thermal pad area.

The thermal pad area should leave the 13 mil holes

exposed. The larger 25 mil holes outside the thermal

pad area should be covered with solder mask.

Apply solder paste to the exposed thermal pad area

and all of the package terminals.

With these preparatory steps in place, the PowerPAD

IC is simply placed in position and run through the

solder

reflow

operation

any

standard

surface-mount component. This results in a part that is

properly installed.

For detailed information on the PowerPAD package

including thermal modeling considerations and repair

procedures, please see Technical Brief SLMA002,

PowerPAD Thermally Enhanced Package, available at

www.ti.com.

LAYOUT GUIDELINES

The OPA561 is a high-speed power amplifier that requires

proper layout for best performance. Figure 8 shows an

example of proper layout.

Pin 1

VOUT

V+

−

−VIN

LIM

E/S

Figure 8. OPA561 Example Layout

Keep power-supply leads as short as possible. This will

keep inductance low and resistive losses at a minimum. A

minimum 18 gauge wire thickness is recommended for

power-supply leads. The wire length should be < 8 inches.

Proper power-supply bypassing with low ESR capacitors

is essential to achieve good performance. A parallel

combination of small ceramic (around 100nF) and bigger

(47

µF) non-ceramic bypass capacitors will provide low

impedance over a wide frequency range. Bypass

capacitors should be placed as close as practical to the

power-supply pins of the OPA561.

PCB traces conducting high currents, such as from output

to load or from the power-supply connector to the

power-supply pins of the OPA561 should be kept as wide

and as short as possible. This will keep inductance low and

also resistive losses to a minimum.

The holes in the landing pattern for the OPA561 are for the

thermal vias that connect the PowerPAD of the OPA561 to

the heatsink area on the printed circuit board (see attached

Land Pattern mechanical drawing). The additional larger

vias further enhance the heat conduction into the heatsink

area. All traces conducting high currents are very wide for

lowest inductance and minimal resistive losses. Note that

the negative supply (V−) pin on the OPA561 is connected

through the PowerPAD. This allows for maximum trace

width for VOUT and the positive power supply (V+).

Not Recommended for New Designs

OPA561 Datasheet(PDF) 11 Page - Texas Instruments

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